Analog Devices DC1840C Demo Manual page 6

DEMO MANUAL DC1840C
DEMONSTRATION CIRCUIT 1682B OPERATION
Board Layout
Proper board layout is crucial for proper LTC4270/LTC4271
chipset operation, robustness, and accuracy. When lay-
ing out, pay attention to parts placement, Kelvin sensing,
power paths, and copper fill. It is imperative to follow the
LTC4270/LTC4271 Layout Guide document when laying
out the board.
C21
0.1µF
V
DD33
CPD
U1
LTC4271
C23
1µF
CND
DPD
C22
1µF
DND
DGND
WÜRTH 7490100143
6
V
DD33
T1
– –
RX RD
R13 R21
100 100
CT(4) CT(3)
R14 R22
100 100
+ +
RX RD
– –
TX TD
R15 R23
100 100
CT(2) CT
R16 R24
100 100
+ +
TX TD
C24, 2nF
2kV
V
EE
V
EE
Figure 6. DC1682B Digital and Analog Isolation
Isolation and Power Supplies
The LTC4270/LTC4271 chipset provides communication
across an isolation barrier through a data transformer
(Figure 6). This eliminates the need for expensive opto-
couplers. All digital pins reside on the digital ground refer-
ence and are isolated from the analog PoE supply. A 3.3V
supply for V and an isolated V
DD
to the DC1682B through the 34-pin connector.
DC1682B SIDE
CPA
U2
LTC4270
AGND
C19
CNA
1µF
100V
DPA
V
EE
DNA
ISOLATION
supply are connected
EE
34-PIN
CONNECTOR
DC1680 SIDE
+
V SUPPLY
–
DD33
R35
10
C
BULK
D1
TVS
BULK
SMAJ58A
DC1840c F06
+
– V
EE
SUPPLY
Rev E