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2.3 Memory and Port Maps
2.4 I/O Port Map
2.3.1 Memory Map - Tundra Universe II-Based PCI-to-VME Bridge
The memory map for the Tundra Universe II-based interface VMIVME-7805/
VME-7805RC is shown in Table 2-1. All systems share this same memory map,
although a VMIVME-7805/VME-7805RC with less than the full 256 MByte of
SDRAM does not fill the entire space reserved for onboard Extended Memory.
Table 2-1 VMIVME-7805/VME-7805RC, Universe II-Based Interface Memory Address Map
MODE
MEMORY ADDRESS RANGE
$FFFF 0000 - $FFFF FFFF
$0400 0000 - $FFFE FFFF
$0010 0000 - $0FFF FFFF
$E0000 - $FFFFF
$D8018 - $DFFFF
$D8016 - $D8017
$D8014 - $D8015
$D8010 - $D8013
$D800E - $D800F
$D8000 - $D800D
$C8000 - $D7FFF
$C0000 - $C7FFF
$A0000 - $BFFFF
$00000 - $9FFFF
* This space can be used to set up protected mode PCI-to-VME windows (also referred to as PCI slave images).
BIOS will also map onboard PCI based NVRAM, Timers and Watchdog Timers in this area.
** This space can be allocated as shared memory (for example, between the Pentium processor-based CPU and
VME Master). Note that if a PMC board is loaded, the expansion BIOS may be placed in this area.
Like a desktop system, the VMIVME-7805/VME-7805RC include special input/
output instructions that access I/O peripherals residing in I/O addressing space
(separate and distinct from memory addressing space). Locations in I/O address
space are referred to as ports. When the CPU decodes and executes an I/O
instruction, it produces a 16-bit I/O address on lines A00 to A15 and identifies the
I/O cycle with the M/I/O control line. Thus, the CPU includes an independent
64 KByte I/O address space, which is accessible as bytes, words or longwords.
Standard hardware circuitry reserves only 1,024 byte of I/O addressing space
from I/O $000 to $3FF for peripherals. All standard PC I/O peripherals, such as
serial and parallel ports, hard and floppy drive controllers, video system, real-
time clock, system timers and interrupt controllers are addressed in this region of
I/O space. The BIOS initializes and configures all these registers properly;
adjusting these I/O ports directly is not normally necessary.
The assigned and user-available I/O addresses are summarized in the I/O Address
Map, Table 2-2.
SIZE
DESCRIPTION
64 KByte
ROM BIOS Image
3.9 GByte
Unused *
255 MByte
Reserved for **
Onboard Extended Memory
(not filled on all systems)
128 KByte
32 KByte
2 bytes
2 bytes
2 bytes
2 bytes
Reserved for BIOS Area
14 bytes
64 KByte
32 KByte
128 KByte
640 KByte
Standard Features 27
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