Mitsubishi Electric RD62P2E Application User's Manual page 66

High-speed counter module
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CH1 Sampling/cycle counter flag
• When the sampling counter function or cycle pulse counter function is selected, the operating status of the selected
function is stored in this area.
• Either of the following values is stored based on the operating status of the function.
Operating status
Function stopped
Function being executed
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory address name
CH Sampling/cycle counter flag
CH1 Latch count value
• The latch count value is stored in this area during the execution of the latch counter function.
• The range of the stored value is between -2147483648 and 2147483647 (32-bit signed binary value).
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory address name
CH Latch count value
Although the storage addresses differ between the latch count value and cycle pulse count current value, the
stored values are always the same (updated simultaneously). Therefore, when the latch counter function or
cycle pulse counter function is executed, the latch count value and cycle pulse count current value do not hold
their previous values.
CH1 Sampling count value
• The sampling count value is stored in this area during the execution of the sampling counter function.
• The range of the stored value is between -2147483648 and 2147483647 (32-bit signed binary value).
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory address name
CH Sampling count value
CH1 Cycle pulse count previous value
• The cycle pulse count previous value is stored in this area during the execution of the cycle pulse counter function.
• The range of the stored value is between -2147483648 and 2147483647 (32-bit signed binary value).
■Buffer memory address
The following shows the buffer memory address of this area.
Buffer memory address name
CH Cycle pulse count previous value
APPENDICES
64
Appendix 3 Buffer Memory Areas
Stored value
0
1
CH1
11
CH1
12 to 13
CH1
14 to 15
CH1
16 to 17
CH2
43
CH2
44 to 45
CH2
46 to 47
CH2
48 to 49

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