Maxim Integrated DS34S132DK Manual

Evaluation kit
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General Description
The DS34S132 evaluation kit (EV kit) is an easy-to-use
EV kit for evaluating the DS34S132 32-port TDM-over-
packet (TDMoP) IC. The EV kit is a stand-alone system
with a TDMoP chip, local oscillator, local control proces-
sor, memory, external E1/T1 LIUs and framers, power
supply, and user interface software included in a 2.5
RU enclosure. The EV kit is controlled over an RS-232
serial link from an external ASCII terminal (typically using
terminal emulation software running on a PC) or through
a telnet session. The ASCII user interface is menu driven
and hierarchical for easy use. The behavior and perfor-
mance of the TDMoP IC can be evaluated with a single
EV kit where the Ethernet signal is looped back to the kit,
or with two EV kits configured as separate end points.
DS34S132 EV Kit System
TDMoP IC Daughter Card (Factory Installed)
MPC8313 CPU Daughter Card (Factory Installed)
User Interface Software (Factory Installed)
Ordering Information
PART
DS34S132DK
TDMoIP is a registered trademark of RAD Data Communications, Ltd.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim's website at www.maximintegrated.com.
EV Kit Contents
TYPE
EV Kit
TDMoIP
DS34S132 Evaluation Kit
Evaluates: DS34S132
Complete System: Motherboard and Daughter
S
Cards in a Convenient 2.5 RU Enclosure
Menu-Driven ASCII Text User Interface Software
S
System Processor on a Separate Daughter Card
S
Ethernet PHYs, I/O Jacks, E1/T1 Transceivers, and
S
Clock Sources on Motherboard
Built-In AC Power-Supply Module
S
Several Popular TCXO and OCXO Oscillators from
S
Which to Select and BNC Connectors for Lab
References
9-Pin Serial Jack to Connect an ASCII Terminal
S
for Configuration and Status
System TCP/IP Stack for Configuration and Status
S
Over IP/Ethernet
One RJ45 Ethernet Jack for Connection to the
S
Ethernet Network
One RJ45 Jack for Each E1/T1 Port
S
RJ45 External Clock Input Jack
S
BNC Common Clock Input Jack
S
BNC Reference Clock Input Jack
S
16-Bit CPU Interface to TDMoP IC
S
®
Evaluation System with No Lid
Features
19-5865; Rev 0; 5/11

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Summary of Contents for Maxim Integrated DS34S132DK

  • Page 1 RJ45 External Clock Input Jack Ordering Information BNC Common Clock Input Jack PART TYPE BNC Reference Clock Input Jack DS34S132DK EV Kit 16-Bit CPU Interface to TDMoP IC ® TDMoIP Evaluation System with No Lid TDMoIP is a registered trademark of RAD Data Communications, Ltd.
  • Page 2: Table Of Contents

    2.5.4 Connecting to an ASCII Terminal ............22 Maxim Integrated...
  • Page 3 5.3.5 Loopbacks ................58 Maxim Integrated...
  • Page 4 Figure 2-1. Motherboard Jumper Locations ............18 Maxim Integrated...
  • Page 5 Figure 5-13. PHY Loopback Diagram ............. 60 Maxim Integrated...
  • Page 6 Table A-3. Control Interface Pinout ............. . . 62 Maxim Integrated...
  • Page 7: Introduction

    The TDMoP IC is connected to 32 E1/T1 transceivers ed to the MPC8313 Ethernet controller for debugging (four DS26518s) on the motherboard to complete the TDM-to-packet path. • Peripheral memory and glue logic • RS-232 interface for control and configuration using an ASCII terminal Figure 1-1. TDMoIP Evaluation System Maxim Integrated...
  • Page 8: Physical Description

    Configuration (S132) menu) (this configures the • Ethernet cable for connection between the DS34S132 device for E1 operation, which is the default): EV kits a. Select 2. General Configuration. • T1/E1 cable(s) b. Select 3. Source IP 1. • Test set (ANT20 or other BERT for E1) Windows is a registered trademark of Microsoft Corp. Maxim Integrated...
  • Page 9: Functional Description

    T1. The T1 interface complies with the following stan- k. Press ESC to return to the Main Configuration dards: AT&T TR-62411, ITU-T Rec. G.703, G.704, ANSI (S132) menu. T1.403, and G.824. The T1 framers support unframed l. Select 4. Bundle Configuration. (pass-through), SF, and ESF. Maxim Integrated...
  • Page 10: Figure 1-3. Ds34S132 Ev Kit Block Diagram

    CMNCLK CLOCK SYNC REFCLK RJ45/E1/T1 STATION CLOCK CLOCK CPLD EXTCLK[0,1] E1/T1 POWER QUICC II PRO MPC8313 DAUGHTER DDR2 CARD SDRAM TCXO OCXO MPC8313 RJ45/ETH ETHERNET PHY 10/100/1000 RS-232 DRIVER THERMINAL CONNECTOR Figure 1-3. DS34S132 EV Kit Block Diagram Maxim Integrated...
  • Page 11: Modes Of Operation

    Figure 1-5 shows the TDM backplane • Framed-with-CAS wiring for one E1/T1 port of the system (there are 32 total In unframed mode, the entire incoming bit stream from E1/T1 TDM ports). each interface is encapsulated into IP/MPLS/MEF-over- Maxim Integrated...
  • Page 12: Ethernet Clock Recovery

    31 and 32 of the TDM backplane for connection to an alternative LIU (e.g., the T3/E3 LIU, DS3150). ETH PHY ETH PHY CONTROLLER MPC8313 DDR2 SERIAL Tx/Rx INCLUDING FLASH BOOT Figure 1-6. CPU and Peripherals Block Diagram Maxim Integrated...
  • Page 13: Tdmop Ic Daughter Card

    *A STACK OF UP TO THREE MPLS LABELS IS SUPPORTED, WHERE THE INNER LABEL IS USED AS THE BUNDLE NUMBER DESIGNATOR. Figure 1-8. TDMoMPLS Packet with VLAN Tag PAYLOAD TYPE VLAN TAG ETH TYPE CONTROL MAC_addr/ ECID = Bundle_Identifier HDLC/OAM/SAToP/ CRC32 BROADCAST/ UP TO 2 TAGS WORD CESoPSN MULTICAST Figure 1-9. TDMoMEF Packet with VLAN Tag Maxim Integrated...
  • Page 14: Tdmop Mappings

    24, 28, OR 32 BYTES L2TPv3/IPv6 OPTIONAL HEADER 44, 48, OR 52 BYTES TDMoIP TDMoIP CONTROL WORD HEADER PAYLOAD 4 BYTES 12 BYTES HEADER 4 BYTES MPLS HEADER 4, 8, OR 12 BYTES Figure 1-10. TDMoIP Encapsulation in an Ethernet Frame Maxim Integrated...
  • Page 15: Packet Delay Variation

    E1/T1 or serial data stream. Framed-with-CAS PACKETS LEAVING THE NEAR-END OF THE EVALUATION BOARD PACKETS ARRIVING AT THE FAR-END OF THE EVALUATION BOARD Figure 1-11. Packet Delay Variation Maxim Integrated...
  • Page 16: End-To-End Delay

    Up to 100m on UTP Cat. 5 Ethernet PDVT underflow/overflow Uplink 10/100/1000 half/full-duplex • Fractional: Time slot/CAS configurable alarm pattern Type port with autonegotiation is transmitted towards the near-end TDM interface in support the event of: Connector 8-pin RJ45 far-end LOS, LOF, AIS PDVT underflow/overflow Maxim Integrated...
  • Page 17: Installation

    11.1cm (4.375in) To set the CPU daughter card jumpers: Physical Width 48.3cm (19in) 1) See Figure 2-2 to locate internal jumpers on the Depth 34.3cm (13.5in) daughter card. 2) Set the daughter card jumpers referring to Table 2-2. Maxim Integrated...
  • Page 18: Figure 2-1. Motherboard Jumper Locations

    Resets DS34S132 daughter card Board reset Resets motherboard Powers down board This powers down the board if JMP30 is not connected Note: The motherboard includes additional factory-set jumpers and switches that must not be changed by the user. Maxim Integrated...
  • Page 19: Figure 2-2. Cpu Daughter Card Jumper Locations

    Reset CPU card Unused CPU control switches Do not change All on CPU control switches Do not change All off Note: The CPU board includes additional factory-set jumpers and switches that must not be changed by the user. Maxim Integrated...
  • Page 20: Connecting To The Ethernet Network Equipment

    Appendix A. Connector Wiring for the connector pin T1 cables. See Figure 2-4. arrangement. Connect the EV kit to the Ethernet network equipment using a standard straight UTP cable. See Figure 2-3. Figure 2-3. UPLINK Connector Figure 2-4. T1/E1 Connectors Maxim Integrated...
  • Page 21: Connecting To The Clock Sources

    50I coaxial cable. The input CLK. See Appendix A. Connector Wiring for the connec- signal must be LVTTL (square wave with 0V/3.3V levels). tor pin arrangement. See Figure 2-5. Figure 2-6. Figure 2-5. EXT CLK Connector Figure 2-6. COMM CLK Connector Maxim Integrated...
  • Page 22: Connecting To The Reference Clock Source

    EV kit configuration using an ASCII terminal. See 9-pin, D-type, female connector designated CONSOLE. 4. Configuration for detailed explanations of param- Appendix A. Connector Wiring for the connector pin eters on the menus. arrangement. See Figure 2-8. Maxim Integrated...
  • Page 23: Front Panel Indicators

    Green LED Off: Ethernet link is disconnected. On: Data is being transmitted/received at the Ethernet interface. Yellow LED Off: No data is being transmitted/received at the Ethernet interface. Note: LINK and ACT are not shown in Figure 3-1. Maxim Integrated...
  • Page 24: Using Telnet Through The Ethernet

    General Configuration Interface Configuration Bundle Configuration Bundle Management Restore Default Configurations Alarms Performance (PM) Utilities Please select item <1 to 9> q: exit, s: save, ESC: previous menu, r or Enter: reprint screen Figure 3-2. Main Configuration Menu Maxim Integrated...
  • Page 25: Redisplaying The Current Menu

    Reference Clock Frequency PPM Offset Clock Recovery DSP File Name rom_code.asm.patch.txt Driver Type Kernel Mode Please select item <1 to 19> q: exit, s: save, ESC: previous menu, r or Enter: reprint screen Please enter your choice: Figure 4-1. Preliminary Configuration Menu Maxim Integrated...
  • Page 26: Table 4-1. Preliminary Configuration Parameter Descriptions

    The oscillator used as the clock recovery refer- Oscillator Type OCXO (Stratum 3E) ence clock Default: OCXO (Stratum 3E) The common clock frequency supplied in the dif- Multiple of 8kHz Common clock Freq ferential mode clock recovery Default: 19440000 Maxim Integrated...
  • Page 27: Configuring General Parameters

    Ethernet Rate & Duplex 100M_FDX, ANEG OAM Configuration > Please select item <1 to 14> q: exit, s: save, ESC: previous menu, r or Enter: reprint screen Please enter your choice: Figure 4-2. General Configuration (Main Menu→General Configuration) Maxim Integrated...
  • Page 28: Table 4-2. General Configuration Parameter Descriptions

    Note: Source IP 1 and Source IP 2 can reside in different subnets. However, the IP mask is used for both source IPs. Either Source IP 1 or Source IP 2 can be selected in the Bundle Configuration menu (see section 4.4 Configuring Bundles). Maxim Integrated...
  • Page 29: Configuring Tdm Interfaces

    TDM interfaces. The user interface software only allows displayed, either Figure 4-5 (E1) or Figure 4-6 (T1), configuration of the number of TDM interfaces actually depending on the setting of the Link Type parameter in supported by the installed IC. the PreConfig Configuration menu. Maxim Integrated...
  • Page 30: Configuring E1 Interfaces

    Default: Short Haul OOS Code: OOS code is sent OOS Code Type Defines what to send if an OOS state occurred. Default: OOS code Maxim Integrated...
  • Page 31 ITU-T Rec. G.704) for the frames transmitted on Yes: CRC-4 option is enabled the E1 link, and the checking of the CRC bits car- Default: No ried by the received E1 link frames. Balanced, Unbalanced IF Type Defines E1 interface type. Default: Balanced Maxim Integrated...
  • Page 32: Configuring T1 Interfaces

    DISPLAYED. FOR EXAMPLE, IF RECOVERY CLOCK MODE IS SET TO AUTO, THEN ITEMS 13–25 AND 27–31 ARE NOT DISPLAYED BECAUSE THEIR VALUES ARE IGNORED IN THAT MODE. THE PARAMETER DESCRIPTIONS IN TABLE 4-5 HAVE NOTES INDICATING THE NECESSARY CONDITIONS FOR A PARAMETER TO BE DISPLAYED. SEE THE ACQUISITION SWITCH PARAMETER. Figure 4-6. T1 Interface Configuration (Main Menu→Interface Configuration→T1 Interface Configuration) Maxim Integrated...
  • Page 33: Table 4-5. T1 Interface Configuration Parameter Descriptions

    T1 line. The OOS signal is also sent toward the 2.5s, then switching to all 1s. T1 line when packet receive buffer overrun or Mark + Space: Transmitting all 1s in CAS for the first underrun occur. 2.5s, then switching to all 0s. Default: Space Maxim Integrated...
  • Page 34 FCC Rules Part 68. For compliance with DSX-1 specifications per AT&T CB-119 and ANSI T1.102-1987, select the value corresponding to the length of the cable (in feet) connected between the T1 port connector and network entry point. Default: DSU Maxim Integrated...
  • Page 35 Enabling adaptive or differential mode of oper- 2: Differential mode Differential Mode ation per port. Default: Adaptive 1: Bit RTP Timestamp Putting timestamp when the RTP is enabled 2: Byte Generation Mode based on bit, byte, or frame byte mode 3: Frame Default: Bit Maxim Integrated...
  • Page 36: Configuring Bundles

    BETWEEN ITEMS 14 AND 20. THE PARAMETER DESCRIPTIONS IN TABLE 4-6 HAVE NOTES INDICATING THE NECESSARY CONDITIONS FOR A PARAMETER TO BE DISPLAYED. SEE THE IP TOS PARAMETER. Figure 4-7. SAToP Bundle Configuration (Main Menu→Bundle Configuration→SAToP Bundle Configuration) Maxim Integrated...
  • Page 37: Table 4-6. Satop Bundle Parameter Descriptions

    Sets the IP TTL field in the IP packets transmitted by the device. TTL assignment applies to all ETH packets leaving the EV kit for 0–255 IP TTL [0 - 255] this bundle. Default: 128 Note: This parameter is displayed only if PSN Type is set to IP. Maxim Integrated...
  • Page 38 Default: Discard Yes: Bundle is used by clock recov- ery mechanism Determines whether this bundle is used by the clock recovery Clock Recovery No: Bundle is not used by clock mechanism. recovery mechanism Default: No Maxim Integrated...
  • Page 39 Determines if an RTP header is used for the bundle. Must be used RTP Mode Disable: RTP header is not used for common clock mode. Default: Disable Must be set to MAC for next hops that do not reply to ARP Next Hop Type requests. Default: IP Maxim Integrated...
  • Page 40 LSP, which is used to tunnel the TDM packets through the MPLS MPLS Outer network. 0–1048575 Label 2 Note: When equal to 0, only the Inner Label exists. This parameter Default: 0 is displayed only when PSN Type = MPLS and Number of Outer Labels is 2. Maxim Integrated...
  • Page 41 UDP port Destination Port side Source: UDP port number is at RX Bundle Source Port side Number Location Indicating the location of the Receiving Bundles UDP port. Destination: UDP port number is at at UDP port Destination Port side Maxim Integrated...
  • Page 42: Configuring Cesopsn Bundles

    BETWEEN ITEMS 14 AND 20. THE PARAMETER DESCRIPTIONS IN TABLE 4-7 HAVE NOTES INDICATING THE NECESSARY CONDITIONS FOR A PARAMETER TO BE DISPLAYED. SEE THE IP TOS PARAMETER. Figure 4-8. CESoPSN Bundle Configuration (Main Menu→Bundle Configuration→CES Bundle Configuration) Maxim Integrated...
  • Page 43: Table 4-7. Cesopsn Bundle Parameter Descriptions

    0–255 [0 - 255] The ToS assignment applies to all ETH packets leaving the Default: 0 EV kit for this bundle. Note: This parameter is displayed only if PSN Type is set to IP. Maxim Integrated...
  • Page 44 CPU: Sends the packets that fail the sanity check to the CPU Switches Sanity check between the received packet length and the Discard: Drops the packets that fail the san- Sanity Check length according to bundle configuration (length mismatch). ity check Default: Discard Maxim Integrated...
  • Page 45 Determines if an RTP header is used for the bundle. Must be RTP Mode Disable: RTP header is not used used for common clock mode. Default: Disable Next Hop Must be set to MAC for next hops that do not reply to ARP Type requests. Default: IP Maxim Integrated...
  • Page 46 PSN Type = MPLS and Number of Outer Labels is 2. Experimental Sets the value of the MPLS experimental bits. 0–7 Bits Note: This parameter is displayed only when PSN Type = MPLS. Default: 0 Maxim Integrated...
  • Page 47 Note: This parameter is displayed only when Redundant is 1 and 1 HW: Only one of the redundant bun- Type Enabled. dles (primary or secondary) is transmitted 1 plus 1 HW: Both redundant bundles (pri- mary and secondary) are transmitted Default: 1 plus 1 HW Maxim Integrated...
  • Page 48: Deleting Bundles

    Once a bundle is deleted, the bundle ID in Bundle To erase all configurations and restore factory-default Configuration is deleted. Any assignments made to that configurations, select Restore Default Configurations bundle are deleted. from the Main Configuration (S132) menu. 4.6 Displaying Active Bundles Maxim Integrated...
  • Page 49: Troubleshooting And Diagnostics

    ON, OFF configuration error). Results in flushing the Rx FIFO’s contents. Rx MPLS Err MPLS packet received with more than three labels (packet is discarded). ON, OFF MAC Receive Fifo Overrun MAC receive FIFO has overflowed. ON, OFF Maxim Integrated...
  • Page 50: Displaying Interface Alarms

    Bipolar violations or code violations Check the TDM equipment and cable connecting it BPV/CV ERRORs on the link receive signal. Updated 0, 1, . . . to the E1 port. once per second. Replace the EV kit. Maxim Integrated...
  • Page 51: Displaying Bundle Alarms

    The DPLL input System Freeze ON, OFF — level was frozen. Free Running with Calibration DSP state (Debug Debugging tool for — Locked use only) designers. Unlocked Maxim Integrated...
  • Page 52: Satop/Ces Bundle Alarms

    Underrun has occurred in jitter buffer. ON, OFF JB Reset Occurred The jitter buffer was reset. ON, OFF ON: Packet is fragmented OFF: Entire (unfragmented) RX Fragmentation Bit Packet fragmentation status. multiframe structure is carried in a single packet Maxim Integrated...
  • Page 53: Displaying Performance Monitoring Counters

    (Figure 5-6). TopPMs Menu Ethernet Performance Interface Performance Bundle Performance Please select item <1 to 3> q: exit, s: save, ESC: previous menu, r or Enter: reprint screen Please enter your choice: Figure 5-6. Performance Monitoring Menu Maxim Integrated...
  • Page 54: Figure 5-7. Ethernet Performance Data Menu

    CRC error, an 0–255 alignment error or a receive symbol error. The number of received packets where the length is less than 64 bytes, Under size Packets 0–255 without CRC error or alignment error. Maxim Integrated...
  • Page 55 Recommendation: Check connection between the (RFC 1643) UPLINK interface and its Ethernet transceiver. 0–255 The number of packets where COL was not asserted within 96 bit-times (an Sqe Tst Errors 0–255 interpacket gap) of TX_EN being deasserted in half-duplex mode. Maxim Integrated...
  • Page 56: Displaying Bundle Counters

    Verify that the IP network devices (switches/routers/modems/etc.) can handle the EV kit PPS (packets per second) rate. Ensure the network devices do not drop/lose/ignore packets by checking their statistics. Minimum JB Level [Usec] The minimum jitter buffer level for the current bundle. Maxim Integrated...
  • Page 57 Received misordered packets. Rx MalFormed Packets Received malformed packets. Rx R-bit Packets Received packets with R-bits. Tx L-bit Packets Transmitted packets with L-bits. Overrun Occurred Number of overrun occurred. Loss of Frames Occurred Total loss of frames occurred. Maxim Integrated...
  • Page 58: Displaying Tdm Interface Counters

    Framer Loopback Disable Local Loopback Disable Ethernet Loopback Unknown PHY Loopback Unknown Please select item <1 to 6> q: exit, s: save, ESC: previous menu, r or Enter: reprint screen Please enter your choice: Figure 5-9. Loopbacks Menu Maxim Integrated...
  • Page 59: Framer Loopback And Payload Loopback

    Figure 5-10. Local Loopback Diagram T1/E1 TRANSCEIVER TDMoP TESTING EQUIPMENT DS34S132 EV KIT TDM INTERFACE IP INTERFACE Figure 5-11. Remote Loopback Diagram T1/E1 TRANSCEIVER TDMoP TESTING EQUIPMENT DS34S132 EV KIT TDM INTERFACE IP INTERFACE Figure 5-12. Ethernet Loopback Diagram Maxim Integrated...
  • Page 60: Phy Loopback

    EV kit software program. 5.3.9 Send OAM Packet to Other Party 5.4 Troubleshooting Chart This option is not functional at this time. Table 5-8 lists possible faults, probable causes, and the actions necessary to correct the situation. Maxim Integrated...
  • Page 61: Table 5-8. Troubleshooting Chart

    Check and replace, if necessary, the cable that con- Cable problem Ethernet interface LINK nects the EV kit UPLINK connector to the LAN. indicator is not lit. Problem on the LAN Check LAN media. Defective EV kit Replace the EV kit if a failure is detected. Maxim Integrated...
  • Page 62: Appendix A. Connector Wiring

    Output Transmit data (ring) TD (T) Output Transmit data (tip) 7, 8 — Not connected Table A-2. Ethernet Connector Pinout Table A-3. Control Interface Pinout FUNCTION FUNCTION – — 4, 5, 7, 8 — 6, 7, 8 — Maxim Integrated...
  • Page 63: Revision History

    Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed.
  • Page 64 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Maxim Integrated DS34S132DK...

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