Technical data of CPU 31xC
6.5 CPU 314C-2 PtP and CPU 314C-2 DP
Technical data
IEC Timers
Type
•
Number
•
Data areas and their retentivity
Flag bits
Retentive address areas
•
Default retentivity
•
Clock flag bits
Data blocks
Size
•
Local data per priority class
Blocks
Total
OBs
Size
•
Nesting depth
Per priority class
•
additional within an error OB
•
FBs
Number, Max.
•
Size
•
FCs
Number, Max.
•
Size
•
Address areas (I/O)
Total I/O address area
Distributed
•
I/O process image
Digital channels
Centralized
•
Integrated channels
•
Analog channels
Centralized
•
Integrated channels
•
6-22
CPU 314C-2 PtP
Yes
SFB
unlimited (limited only by RAM size)
CPU 314C-2 PtP
256 bytes
Configurable
MB0 to MB15
8 (1 byte per flag bit)
Max. 511
(in the 1 to 511 range of numbers)
Max. 16 Kbytes
Max. 510 bytes
CPU 314C-2 PtP
1024 (DBs, FCs, FBs)
The maximum number of blocks that can be loaded may be reduced if you are
using another MMC.
See the Instruction List
Max. 16 KB
8
4
1024
(in the 0 to 2047 range of numbers)
Max. 16 KB
1024
(in the 0 to 2047 range of numbers)
Max. 16 KB
CPU 314C-2 PtP
Max. 1024 bytes / 1024 bytes
(can be freely addressed)
None
128 bytes / 128 bytes
Max. 1016
Max. 992
24 DI / 16 DO
Max. 253
Max. 248
4 + 1 AI / 2 AO
CPU 314C-2 DP
CPU 314C-2 DP
CPU 314C-2 DP
CPU 314C-2 DP
Max. 1024 bytes / 1024 bytes
(can be freely addressed)
Max. 1000 bytes
128 bytes / 128 bytes
Max. 8192
Max. 992
24 DI / 16 DO
Max. 512
Max. 248
4 + 1 AI / 2 AO
CPU 31xC and CPU 31x, Technical Data
Manual, 01/2006 Edition, A5E00105475-06