Technical data of CPU 31x
7.5 CPU 315-2 PN/DP
Technical data
IEC timers
•
•
Data areas and their retentive address areas
Bit memory
•
•
Clock memory
Data blocks
•
•
•
Local data per priority class
Blocks
Total
OBs
•
Nesting depth
•
•
FBs
•
•
FCs
•
•
Address areas (I/O)
Total I/O address area
Distributed
I/O process image
Digital channels
Of those central
Analog channels
Of those central
7-20
Type
Number
Retentive address areas
Preset retentive address areas
Number
Size
Non-Retain support (configured retention)
Size
Per priority class
Additional within an error OB
Number, Max.
Size
Number, Max.
Size
Yes
SFB
Unlimited
(limited only by work memory)
2048 bytes
Configurable
From MB0 to MB15
8 (1 memory byte)
1023
(in the 1 to 1023 range of numbers)
16 Kbytes
Yes
Max. 1024 bytes per run level / 510 bytes per
block
1024 (DBs, FCs, FBs)
The maximum number of blocks that can be
loaded may be reduced if you are using another
MMC.
See the Instruction List
16 Kbytes
8
4
See the Instruction List
1024
(in the 0 to 2047 range of numbers)
16 Kbytes
See the Instruction List
1024
(in the 0 to 2047 range of numbers)
16 Kbytes
Max. 2048 bytes / 2048 bytes
(can be freely addressed)
Max. 2000 bytes
128/128
16384/16384
Max. 1024
1024/1024
Max. 256
CPU 31xC and CPU 31x, Technical Data
Manual, 01/2006 Edition, A5E00105475-06