Programming Enable Registers - Keithley S46 Instruction Manual

S46/S46T/S46L Microwave Switch System Instruction Manual
Table 3-11
Common and SCPI commands: Reset registers and clear queues
Commands
To reset Standard
Event Register:
*ESE 0
or
*CLS
To clear error queue:
*CLS
STATus
:QUEue
{:NEXT}?
:CLEar
SYSTem
:ERRor?
:CLEar
Notes:
1. The Standard Event Enable Register is not reset by
SRQ).
2. STATus:PRESet
3. Use either of the two

Programming enable registers

The registers that can be user-programmed are the enable registers. All other registers in the
status structure are read-only registers. The following paragraphs explain how to ascertain the
parameter value for the various commands used to program enable registers. The actual
commands are described later in this section (see
A command to program an event enable register is sent with a decimal parameter value that
determines the desired state (0 or 1) of each bit in the appropriate register. The bit positions of the
register indicate the parameter value in binary format. For example, if you wish to set bits B5, B4,
and B2 (set the bit's value to 1), the binary value would be 110100 (where B5=1, B4=1, B3=0,
B2=1, B1=0, B0=0 and all other bits are 0). The decimal equivalent of binary 110100 is 52.
Therefore, the parameter value for the enable command is 52.
Another way to determine the decimal value is to add up the decimal weights for the bits that you
wish to set. Note that
B3, and B2, the parameter value would be the sum of the decimal weights for those bits
(32+16+4 = 52).
Table 3-12
16-bit status register
Bit position B7
Binary value 0/1
Decimal weights 128
Document number: S46-901-01 Rev. F / March 2011
Description
Reset all bits of the Standard Event Register to 0.
Clear all messages from error queue.
STATus subsystem:
Error queue:
Read and clear the oldest error/status message.
Clear all messages from error queue.
SYSTem subsystem:
Read and clear the oldest error/status message.
Clear all messages from error queue.
has no effect on the error queue.
commands to clear the error queue.
:CLEar
Table 3-12 includes the decimal weight for each register bit. To set bits B5,
B6 B5
0/1 0/1
64 32
7 6 5
(2 ) (2 ) (2 )
STATus:PRESet (see
Table 3-13).
B4 B3 B2
0/1 0/1 0/1
16 8 4
4 3 2
(2 ) (2 ) (2 )
Section 3: Operation
Reference
Note 1
Note 1
Note 2
Note 2
Status byte and
B1 B0
0/1 0/1
2 1
1 0
(2 ) (2 )
3-19