Service Request Enable Register; Serial Polling And Srq; Clearing Registers And Queues - Keithley S46 Instruction Manual

Section 3: Operation

Service Request Enable Register

The generation of a service request is controlled by the Service Request Enable Register. This
register is user-programmed and is used to enable or disable the setting of bit B6 (RQS/MSS) by
the status summary message bits (B2, B4, B5, and B6) of the Status Byte Register. As shown in
Figure 3-12, a logical AND (&) operation is performed on the summary bits with the corresponding
enable bits of the Service Request Enable Register. When a logical AND (&) operation is
performed on a set (1) summary bit with an enabled (1) bit of the Service Request Enable
Register, the logic "1" output is applied to the input of the OR gate and, therefore, sets the MSS/
RQS bit in the Status Byte Register.
The individual bits of the Service Request Enable Register can be set or cleared by using the
common command. To read the Service Request Enable Register, use the
The Service Request Enable Register clears when power is turned of and then turned on again, or
when a parameter value of 0 is sent with the
commands to program and read the Service Request Enable Register are listed in

Serial polling and SRQ

Any enabled event summary bit that goes from 0 to 1 will set bit B6 and generate an SRQ (service
request). In your test program, you can periodically read the status byte to check if an SRQ has
occurred and what caused it. If an SRQ occurs, the program can, for example, branch to an
appropriate subroutine that will service the request.
Typically, SRQs are managed by the serial poll sequence of the relay unit. If an SRQ does not
occur, bit B6 (RQS) of the Status Byte Register will remain cleared, and the program will simply
proceed normally after the serial poll is performed. If an SRQ does occur, bit B6 of the Status Byte
Register will set, and the program can branch to a service subroutine when the SRQ is detected by
the serial poll.
The serial poll automatically resets RQS of the Status Byte Register. This allows subsequent serial
polls to monitor bit B6 for an SRQ occurrence generated by other event types. After a serial poll,
the same event can cause another SRQ, even if the event register that caused the first SRQ has
not been cleared.
The serial poll does not clear MSS. The MSS bit stays set until all status byte summary bits are
reset.

Clearing registers and queues

When the S46/S46T/S46L power is turned on, the bits of all registers in the status structure are
clear (set to 0) and the two queues are empty. Commands to reset the event and event enable
registers, and the error queue are listed in
register can be reset by sending the 0 parameter value with the individual command to program
the register.
NOTE
3-18
has no effect on status structure registers and queues. See
*RST
details about the error queue.
S46/S46T/S46L Microwave Switch System Instruction Manual
command (for example,
*SRE
Table 3-11. In addition to these commands, any enable
Document number: S46-901-01 Rev. F / March 2011
*SRE
query command.
*SRE?
). The
*SRE 0
Table 3-13.
Queues for