Yaesu FT-8100R Technical Supplement page 25

Circuit Description - - - - - - - - - - - - - -
ative frequency divider, refer ence frequen cy di-
vide r, phase com pa rator, charge pump, shift reg-
ister, latch, etc .
The output from pin 20f J4401 of the 430-VCO
Unit is di
vided by
th e co m pa ra tive frequency
d ivide r according to the freq uency d ivid ing data
that is associated wi th the setting frequen cy in-
put from the CPU. It is then se n t to the phase
com parator.
The 12.8 MH z frequ en cy of th e refe re nce os-
cilla to r circ u it m ad e up of X2002 a nd Q 2029
(2S C28 12-L6)
is
di vided by th e referen ce fre-
quency divid er in to 2,560 or 2,048 parts to be-
come 5 kH z or 6.25 kH z com pa ra tive refer en ce
frequ encies, w hich are utilized by the phase com-
parator. Either of the com parative reference fre-
qu encies is selec ted according to frequ ency steps:
5 kH z is selected for the 5/ 10/ 15/ 20 kH z steps,
and 6.25 kH z is selected for the 125 / 25/ 50 kHz
steps.
Th e pha se com pa ra tor co m pa res the phase
between the frequency-di vid ed oscillation fre-
quency o f th e
veo
circu it and comparative ref-
ere nce frequ en cy (5 kH z o r 6.25 kH z) and its
ou tp u t is a pu lse correspondi ng to the phase dif-
fer ence. This pulse is in tegrated by the cha rge
pump and loop filter into a control voltage (VCV)
to contro l the osc illati on fre que ncy of th e
veo
circu it.
Wh en the p ower is turned o n or th e tx /rx
ope ration is switched, the frequ en cy and the fre-
quency d ivid ing ratio d ata for the reference fre-
qu ency di vid er
ar e
se nt serially from the Cl'U to
the PLL Ie. This serial data is converted by the
shift register and latch into parallel d ata to con-
trol the reference frequ ency di vider and compar-
ative frequency di vid er.
Th e presence or absence of phase d iffer ence
3-6
as the result o f com pariso n by th e phase co m-
parator is se nd as an "Un loc k" signal from th e •
lock detector circu it inside the PLL Ie. This sig-
nal is sent to the APe circu it to d isab le transmis-
sion when th e PLL circuit is unlock ed .
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IT-BlOOR TechnicAl Supp lemen t