T/R Module Control Signals - Analog Devices ADAR1000-EVALZ User Manual

ADAR1000-EVALZ
Table 4. Pinout for 1.8 V Logic Connector P6
Pin Signal Name Function
1 CSB Serial port enable input (active low)
2 AGND Analog ground
3 SDIO Serial data input and output
4 AGND Analog ground
5 SDO Serial data output
6 AGND Analog ground
7 SCLK Serial clock input
8 AGND Analog ground
9 TR Transmit and receive switching input
10 AGND Analog ground
11 TX_LOAD Load transmit configurations input
12 AGND Analog ground
13 RX_LOAD Load receive configurations input
14 AGND Analog ground
15 PA_ON PA bias enable input
16 AGND Analog ground
Board Address Selection
The ADAR1000 supports up to four devices on the same serial
peripheral interface (SPI) connection, with each device
identified by the address bits (AD1 and AD0). Jumper Block
P10 selects the source that determines these two bits, as shown
in Table 5.
Table 5. Jumper Block P10 Selections
Jumper Connection
Position 1 to Position 3
Position 3 to Position 5
Position 3 (Not Connected)
Position 2 to Position 4
Position 4 to Position 6
Position 4 (Not Connected)
Pmod™ Compatible Interface
The 3.3 V digital interface signals are also repeated on
Connector P3, arranged to be compatible with the Pmod
interface connector available on many field programmable gate
array (FPGA) evaluation kits or modules. Appropriate FPGA
programming is required to use this function. The pinout of the
P3 connector is shown in Table 6.
User Guide
Function
AD1 is controlled by SDP GPIO2
AD1 = high
AD1 = low
AD0 is controlled by SDP GPIO3
AD0 = high
AD0 = low
Table 6. Pmod Compatible Interface (P3)
Pin
1
2
3
4
5
6
7
8
9
10
11
12

T/R MODULE CONTROL SIGNALS

The ADAR1000
which typically contain an LNA, a PA, a T/R selection switch,
and possibly a polarization selection switch. The 24-pin header,
P9, contains signals in groups of six to control the four T/R
modules. The pinout of P9 is shown in Table 7.
Table 7. T/R Module Interface Connector (P9) Pin Out
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Rev. 0 | Page 5 of 18
Signal
GPIO0 (RX_LOAD)
SPI_SEL_A
GPIO1 (TX_LOAD)
SPI_MOSI
GPIO4 (TR)
SPI_MISO
GPIO5 (PA_ON)
SPI_CLK
AGND
AGND
No connect
No connect
controls the operation of four T/R modules,
Signal
TR_SW_NEG
LNA_BIAS
TR_SW_POS
TR_POL
PA_BIAS4
AGND
TR_SW_NEG
LNA_BIAS
TR_SW_POS
TR_POL
PA_BIAS3
AGND
TR_SW_NEG
LNA_BIAS
TR_SW_POS
TR_POL
PA_BIAS2
AGND
TR_SW_NEG
LNA_BIAS
TR_SW_POS
TR_POL
PA_BIAS1
AGND
UG-1283