Digital Input And Outputs - Analog Devices ADAR1000-EVALZ User Manual

UG-1283
NETWORK
ANALYZER
RF_IO

DIGITAL INPUT AND OUTPUTS

SDP Connector
The J5 connector interfaces to the SDP adapter that connects
to a Windows-based PC. A detailed description of the SDP
adapter is found in the SDP-S Controller Board
All internal registers and control functions of the ADAR1000-
EVALZ evaluation board are driven from the PC using the
evaluation software.
Daisy-Chain Interface Connectors
The 20-pin connectors (P1 and P2) also carry the digital signals
for controlling the ADAR1000. The two connectors have
identical pinouts, and the connectors daisy-chain up to four
ADAR1000-EVALZ evaluation boards controlled through a
single USB interface. All signals on these connectors except
Pin 15 operate at 3.3 V logic levels, and these signals pass
through 3.3 V to 1.8 V logic translators before connecting to the
digital pins on the ADAR1000, which operate at 1.8 V logic
levels. The serial data output (SDO) pin from each ADAR1000,
with its 1.8 V logic levels, can be tied together through the daisy
chain (Pin 15 on P1 and P2) by installing a 0 Ω resistor jumper
(R36). The pinout of P1 and P2 is shown in Table 3.
The TR, TX_LOAD, RX_LOAD, and PA_ON pins on the
ADAR1000 are also controlled by software via general purpose
input output (GPIO) lines on the SDP connector and 3.3 V to
1.8 V level shifters.
RX1
Figure 3. Typical Evaluation Board Setup
Table 3. Pinout for Digital Interface Connectors P1 and P2
Pin
1
2
3
user guide.
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
1 3.3 V logic, unless noted otherwise.
Device Interface with 1.8 V Logic Levels
Logic signals on the
connector, P6, to allow direct interface to the device using 1.8 V
logic signals. To operate in this mode, the logic level translators
(U2, U4, and U5) must be disabled using the J4, J5, J7, and J9
jumpers. The pinout for connector P6 is shown in Table 4.
Rev. 0 | Page 4 of 18
ADAR1000-EVALZ
4
+3.3V –5V –3.3V GND USB
1 Signal Name Function
AGND Analog ground
AGND Analog ground
AVDD 3.3 V supply
AVDD 3.3 V supply
AVDD 3.3 V supply
AGND Analog ground
AVDD1 −5 V supply
No Connect Not used
GPIO0 RX_LOAD input (3.3 V logic)
GPIO1 TX_LOAD input (3.3 V logic)
GPIO2 AD0 (chip Address 0) input (3.3 V logic)
GPIO3 AD1 (chip Address 1) input (3.3 V logic)
GPIO4 TR input (3.3 V logic)
GPIO5 PA_ON input (3.3 V logic)
SDO Device serial data output (1.8 V logic)
SPI_CLK Serial clock input (3.3 V logic)
SPI_MOSI Serial data input (3.3 V logic)
SPI_SEL_A Serial enable input, active low (3.3 V
logic)
SPI_MISO Serial data output (3.3 V logic)
AGND Analog ground
ADAR1000
User Guide
SDP
ADAPTER
are brought to an optional