Applicant: Motorola, INC
mode. If ATS102=0, which is the default value, the WKUPO_N signal and mechanism is
In case the serial interface incorporates hardware flow control signals, the data will be sent
according to their state, after the ATS102 delay time has expired.
• ATS100 - Defines the application minimal wakeup duration, in Seconds, for a single wakeup
event. This time definition is required to avoid frequent unnecessary wakeup events and
consequent ATS102 delays.
The application may return to low power mode after the serial interface has been inactive for
the duration set by ATS100. This duration is measured from the last data sent or received on
the serial interface.
The following guidelines apply to the wakeup-out mechanism:
• The module will set the WKUPO_N signal low to indicate that in has data to send through the
• The module will start sending the data to the application after the delay defined by ATS102.
• The WKUPO_N signal will remain low while data is being sent to the host application.
• The host application should keep its serial interface active, and not switch to low power mode,
while the WKUPO_N signal is low.
• The module will set the WKUPO_N signal high when it has completed sending the data.
• The application serial interface must stay active, and not switch to low power mode, for the
duration set by ATS100, after WKUPO_N is set high.
• The module will not set the WKUPO_N signal low if it needs to send additional data during the
ATS100 delay time.
• The application may switch to low power mode after the WKUPO_N signal is set high and the
serial interface has been inactive for the duration set by ATS100.
FIGURE 25 – WKUPO_N operation
The module incorporates an internal antenna detection circuit, which senses the physical connection and
removal of an antenna or antenna circuit on the module's antenna connector. The antenna detection state
is reported to the application through the ANT_DET output signal, and may also be queried by the ATS97
The detection circuit senses DC resistance to ground on the module's antenna connector.
A DC resistance below 100KΩ (± 5%) is defined as a valid antenna connection, and the ANT_DET output
signal is set high.
A DC resistance above 100KΩ (± 5%) is defined as an antenna disconnection, and the ANT_DET output
is set low.
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C24 Hardware Interface Manual