Application Notes; Notes On Handling; Static Electricity; Noise - Epson RTC-72421 Applications Manual

Real time clock module
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Application notes

1. Notes on handling

In order to enable the RTC-72421/RTC-72423 module to operate at low power levels, C-MOS circuitry was used in the
design of the chip. To prevent damage to this RTC, note the following points:

(1) Static electricity

While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be
damaged by a large discharge of static electricity. Containers used for packing and transport should be constructed of
conductive materials. In addition, only soldering irons, measurement circuits, and other such devices which do not
leak high voltages should be used with this module, which should also be grounded when such devices are being
used.

(2) Noise

If a signal with excessive external noise is applied to the power
supply or input pins, the device may malfunction or "latch up". In
order to ensure stable operation, use a bypass capacitor
(preferably ceramic) of 0.01µF to 0.1µF as close as possible to
the power supply pins (V
device that generates high levels of electronic noise near the
RTC-72421/RTC-72423 module.
Do not connect signal lines to the RTC-72421/RTC-72423 module
within the area shown hatched in the figure on the right, and, if
possible, embed this area in a GND land.

(3) Voltage levels of input pins

Apply signal levels that are as close as possible to V
will cause increased current consumption and a reduced noise margin, and can impair the functioning of the device.
Since it is likely that power consumption will increase excessively and operation cannot be guaranteed, the setting of
the voltage range of V
by ripple or other noise.
Note that the CS
pin cannot handle a TTL interface.
1
(4) Unused signal pins
Since the input impedance of the signal pins is extremely high, operating the device with these pins open circuit can
lead to malfunctions due to noise. Pull-up or pull-down resistors should be provided for all unused signal pins. The N.C.
pins should be connected to either V
and GND). Also avoid placing any
DD
2 and V
2 at the CS
pin should be such that the system is designed so that it is not affected
IH
IL
1
or GND, to prevent noise. If not using the ALE pin, connect it directly to V
DD
and ground, to all pins except the CS
DD
Page-23
pin. Mid-level potentials
1
.
DD

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