A3 Analyzer Interface Assembly - HP 11848A Service Manual

Phase noise interface
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Service
Model 11848A
The output of the Integrator, where the panel Meter is placed, is the most sensitive point to monitor
phase quadrature error. When a measurement is made using a phase-lock loop, the meter indicates
whether or not the control voltage being sent to an external VCO is in an acceptable range. In particular,
it warns the user when one of the input sources is drifting (before the loop unlocks). Note, however,
that the meter will also read near zero when phase lock is broken because the average dc voltage in a
beatnote between two sources is near zero and the Out-of-Lock Flip-Flop forces the Integrator to unity
gain.
Switch S3 (with switch K10) closes the phase-lock loop. S3 is opened when a noise measurement
is made without using a phase-lock loop to uncouple the output circuits but leave the Meter in.
Attenuator 2 can be set to either 0 or 6 dB; it controls the signal level into the Summing Junction.
The Summing Junction has several functions:
• It sums the phase-error signal with a programmable dc output from DAC 1 which tunes the
external VCO.
• It routes the noise source from the FFT spectrum analyzer (via switch S1) to the output
circuits when the error transfer function of the closed phase-lock loop is measured. From this
measurement, correction factors are calculated in the phase-noise measurement. (S2 is unused.)
• It enables the Search Oscillator when switch S4 is closed and the phase-lock loop is unlocked.
The oscillator starts automatically when the loop goes out of lock and provides a 1.6 Hz search
signal which sweeps the external VCO until the VCO is captured by the loop. When the Search
Oscillator is oscillating, the Oscillation Detector sets the Out-of-Lock Flip-Flop.
Before the tune voltage is applied to the VCO (connected to the rear-panel TUNE VOLTAGE
OUTPUT connector), it passes through programmable Lag-Lead Network 1, Buffer 2, programmable
Attenuator 1, Buffer 3, and Lag-Lead Network 2. The latter three circuits are duplicated in the
A3 Analyzer Interface Assembly which output the tune voltage to the front-panel TUNE VOLTAGE
OUTPUT connector. (The front-panel output is preferred because of a floating amplifier which breaks
potential ground loops.)
The lag-lead networks shape the tune voltage to give the phase-lock loop maximum low-frequency
gain (for good drift tracking) while maintaining loop stability. The frequency responses of the lag-lead
networks are shown in the block diagram notes. Lag-Lead Network 1 is programmable; the controller
selects the optimum pole and zero frequencies based on the measured tuning characteristics of the VCO.
A3 Analyzer Interface Assembly
The primary function of the A3 Analyzer Interface Assembly is to condition the output noise signal
to be measured by the FFT spectrum analyzer. The noise signal is routed from the A4 Phase Detector
Assembly through switches S7 and S8 in that assembly. The noise signal passes through a series of
amplifiers and filters.
Gain stage Gain 3 has two parts: (1) a programmable-gain amplifier (6, 12, 20, and 26 dB) with an
output at switch L4 and (2) an additional 6 dB attenuator with its output through switch L3. (The
gains stated for Gain 3 are for the entire path from the input of the amplifier to the output of the
High-Pass Filters. The High-Pass Filters have a passband gain of 6 dB.) The controller sets the gain
so as to present an optimum level for the input to the FFT spectrum analyzer.
After passing through Buffer 1, the signal is low-pass filtered. Since the measurement range of the
FFT spectrum analyzer is 100 kHz, the signal is filtered by the 100 kHz Low-Pass Filter then passed
through one of a set of decade-spaced Low-Pass Filters as selected by switches F0 through F5. The
filters match the default sweep ranges of the FFT spectrum analyzer and remove the high-frequency,
out-of-range components. (The filters match the default sweep ranges even when sweep segments other
than default are selected.)
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