Dcache Status Register - Dc_Stat - Compaq AlphaServer DS20 Service Manual

3.3 Dcache Status Register – DC_STAT
The Dcache Status Register (DC_STAT) is a read-write register. If a Dcache tag
parity error or data ECC error occurs, information about the error is latched in
this register. The register is read only by PALcode and is an element in the CPU
or System Uncorrectable Machine Check Error Logout frame.
61
31
SEO
ECC_ERR_LD
ECC_ERR_ST
TPERR_P1
TPERR_P0
32
4 3 2 1 0
PK1416-99
Error Registers 3-5