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V1630 AES-EBU DISTRIBUTION AMPLIFIER Applicable to Assy 130-1210 ISSUE B INSTALLATION and OPERATION Pro-Bel Ltd DaneHill Lower Earley Reading RG6 4PB ENGLAND Tel. +44 986 6123 Fax. +44 975 5787 30 November, 2006 V1630OP1 / Issue 6 Page 1 of 8...
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This page is intentionally left blank Page 2 of 8 V1630OP1 / Issue 6 30 November, 2006...
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· Input cable length 100m+: Equaliser in Input impedance may be set to either 110/75 W or Hi-Z to facilitate daisy-chaining V1630 inputs within a V1600 rack. The sampling rate of each channel is displayed by means of front panel LEDs and an ERROR LED is provided to indicate channel errors/no input.
1U panels are similarly marked and details for the standard rear panel options are given in Table 2.1.1. The V1630 may also be ordered with a rear panel having D-type connectors. The pinout of the D-connectors are shown in Table 2.1.3.
(³ 10kW) by means of jumpers LK3 and LK5. The high impedance function may be used when it desired to daisy-chain the inputs of a number of V1630 DA’s in a rack, without cascading them. In this case one of the V1630s is set for 110/75 ohms and the others are set to high input impedance.
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2.3 INPUT EQUALISATION The input equalisers on the V1630 should be used whenever the source cable length is greater than 90- 100m. The two input channels (A and B) have independent equalisers, each of which is associated with two jumpers as shown in the table and the figure below. Jumper combinations other than those shown should not be used.
3.2 LED INDICATIONS The V1630 has front panel indicators as shown above. Each channel has a set of four yellow LEDs for sample rate indication. The sample rate must be within 4% of the nominal for the indicators to function correctly.
DARTbus. In addition the unit presents two bytes of status information to the DART system and the DART system can write one byte of control data to the V1630. Full details of the bit allocations may be found in document number scsm1630.doc.