Mitsubishi Electric RD81DL96 User Manual page 37

Own station (Control CPU, other CPUs in multiple CPUs)
The following table shows the accessible route to a CPU module of the high speed data logger module-mounted station.
: Accessible, : No combination
Access route
Control CPU
Other CPUs in multiple CPUs
*1 RnENCPU is not applicable.
Another station via single network
■Access from the Ethernet port of a high speed data logger module
The following table shows the accessible route when accessing from an Ethernet port of a high speed data logger module in
the status where an access target CPU is connected to a network.
The communication target from an Ethernet port of the high speed data logger module, Ethernet module or CPU module
(Ethernet port) can be specified.
: Accessible, : No combination
Access route
Ethernet
• High speed data logger module Ethernet port → CPU module (Ethernet
port)
• High speed data logger module Ethernet port → Ethernet module
*1 An Ethernet module-mounted station or built-in Ethernet CPU can be accessed. Access via relay station is not possible.
*2 UDP (MELSOFT Connection) needs to be added to the open setting for a built-in Ethernet port of an access target CPU.
*3 When accessing an Ethernet port of Q12DCCPU-V (Basic mode) directly, MELSOFT connection needs to be permitted in the
Q12DCCPU-V (Basic mode) setting.
For details on the setting, refer to the following manual.
 C Controller Module User's Manual (Utility Operation, Programming)
Access destination CPU module (series)
RCPU QCPU (Q mode)
Programm C Programm
able Controller able
controller module controller
CPU/ CPU/
Process Process
CPU CPU
  
*1
  
(PLC No.1 to
No.4)
Access destination CPU module (series)
RCPU QCPU (Q mode)
Programm C Programm
able Controller able
controller module controller
CPU/ CPU/
Process Process
CPU CPU
*1,*2
  
(PLC No.1 to (PLC No.1 to (PLC No.1 to
No.4) No.4) No.4)
2.2 Accessible Routes and Devices
LCPU
C Programm
Controller able
module controller
CPU
 
 
LCPU
C Programm
Controller able
module controller
CPU
*3
 
(Host CPU)
2 SPECIFICATIONS
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