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18. The total error in a voltage setting is:
Error = DC Zero Offset + Gain × Voltage Setting
For a 1 V signal the theoretical error can be as high as 2.5 mV. In practice the error is generally less than 1
mV.
19. This specification is guaranteed by design. It is not tested.
20. This specification is measured by applying zero voltage across a 1 Ω resistor and measuring current noise
on the 500 µA scale. 1 µV of voltage noise creates a current of 1 µA. The filters in the ADC Chain for the I
Signal are used to limit the bandwidths as shown in the specifications. Signal averaging via Gamry DSP
mode further reduces the measured noise.
21. See Appendix D.
22. Excluding external power adapter and any cables supplied with unit.
23. Excluding removable line cord.
24. A platinum RTD sensor according to DIN/IEC751 European Standard is used to measure the temperature of
a sample.
25. Measured between 0 and 100°C.
26. Two-pin connection through front panel Monitor connector or through BNC connector at Monitor board.
Monitor board is an optional accessory.
27. Isolation quality has both DC and AC factors, predominantly at the power-supply frequency of 300 kHz.
Only the DC leakage current is shown here. Measured under the following conditions: cell is a 10 kΩ
resistor, PSTAT mode, CA speed is normal, I/E stability is slow, I/E range is 50 µA, I-channel filter is 5 Hz,
and I-channel gain is 100.
Appendix A: Interface 5000 Specifications
63
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