Absolute Maximum Ratings - NAD T737 Service Manual

Av surround sound receiver
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Pin No.
Mnemonic
46
ELPF
70, 59
TEST0 -
TEST1
15
SFL/SYNC_O
UT
64
REFOUT
65
CML
61, 62
CAPY1–
CAPY2
68, 69
CAPC1–
CAPC2
67
BIAS
86
HS_IN/CS_IN
85
VS_IN
79
DE_IN
35
DCLK_IN
52
SOG
77
SOY
1.8

Absolute Maximum Ratings

Parameter
A
to AGND
VDD
D
to DGND
VDD
P
to AGND
VDD
D
to DGND
VDDIO
D
to A
VDDIO
VDD
P
to D
VDD
VDD
D
– P
VDDIO
VDD
D
– D
VDDIO
VDD
A
– P
VDD
VDD
A
– D
VDD
VDD
Digital Inputs Voltage to DGND
Digital Outputs Voltage to DGND
Analog Inputs to AGND
Maximum Junction Temperature
Type
Function
mode the crystal must be a fundamental crystal.
O
The recommend external loop filter must be connected to this
ELPF pin.
O
These pins should be unconnected
O
SFL (Subcarrier Frequency Lock); this pin contains a serial
output stream which can be used to lock the subcarrier
frequency when this decoder is connected to any Analog
Devices digital video encoder. SYNC_OUT is the sliced sync
output signal only available in CP mode.
O
Internal voltage reference output.
O
The CML pin is a common-mode level for the internal ADCs.
I
ADC capacitor network.
I
ADC capacitor network.
O
BIAS is an external bias setting pin. Connect the
recommended resistor between pin and ground.
I
Can be configured in CP mode to be either a digital HS input
signal or a digital CS input signal used to extract timing in a
5-wire or 4-wire RGB mode.
I
VS input signal used in CP mode for 5-wire timing mode.
I
DE_IN is a data enable input signal used in 24-bit digital
input port mode, for example,
24-bit RGB data from a DVI Rx IC.
I
DCLK_IN is a clock input signal used in 24-bit digital input
mode (e.g. 24-bit RGB data from a DVI Rx IC) and also in
digital CVBS input mode.
I
SOG is a sync on green input used in embedded sync mode.
I
SOY is a sync on luma input used in embedded sync mode.
Table 2: Absolute Maximum Ratings
2-11
Rating
4 V
2.2 V
2.2 V
4 V
í0.3 V to +0.3V
í0.3 V to +0.3 V
í0.3 V to +2 V
í0.3 V to +2 V
í0.3 V to +2 V
í0.3 V to +2 V
DGND í 0.3 V to D
VDDIO
DGND í 0.3 V to D
VDDIO
AGND í 0.3 V to A
VDD
125°C
ADV7403
+ 0.3 V
+ 0.3 V
+ 0.3 V

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