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When a new source line is assembled, the assembler overwrites what was previously in memory. If
no new source line is submitted, or if there is an error in the source line, then the contents of
memory remain unchanged. Each of the instruction pairs Arithmetic Shift Left (ASL)/Logical
Shift Left (LSL) have the same opcode, so disassembly always displays the ASL mnemonic. If the
assembler tries to assemble at an address that is not in RAM, an invalid address message "rom-
xxxx" is displayed on the terminal CRT (xxxx = invalid address).
The following pages describe how to operate the assembler/disassembler by creating a typical
program loop, and debugging the program by the use of the EVB monitor commands. A typical
Serial Communications Interface (SCI) program loop is first assembled. Routine examples are
then provided to illustrate how to perform breakpoint setting, proceeding from breakpoint,
register display and modification, and initiation of user program execution.
A program loop (that transmits RAM data from the SCI transmitter to the SCI receiver) is
assembled as follows:
EXAMPLE PROGRAM
>BF C200 C21F 00<CR>
>ASM C000
C000 CLR
$0800
18 CE C2 00
C004 TEST
CE C4 00
C007 TEST
B6 10 2E
C00A TEST
A6 00
C00C TEST
B7 10 2F
C00F INX
B6 10 2E
C012 TEST
84 80
C014 TEST
27 F9
C016 BITB $80F6
B6 10 2E
C019 BVS
$C01B
84 20
(continued)
M68HC11EVB/D
PROGRAM DESCRIPTION
>LDY #C200<CR>
>LDX #C400<CR>
>LDAA 102E<CR>
>LDAA 0,X<CR>
>STAA 102F<CR>
>LDAA 102E<CR>
>ANDA #80<CR>
>BEQ C00F<CR>
>LDAA 102E<CR>
>ANDA #20<CR>
OPERATING INSTRUCTIONS
Clear memory space.
Enter assembler/disassembler mode.
First byte where data is stored.
Point to data to be fetched.
Clear RDRF bit if set.
Get first data byte.
Store data in SCI data register.
Read SCI status register.
Send data byte.
Wait for empty transmit data reg.
Read SCI status register.
Extract RDRF bit from status reg.
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