Marantz SA17S1 Service Manual page 21

Analog Pins
Name Type Description
BYP — The RF AGC integration capacitor CBYP, is connected between BYP and VPA.
CP — DIFFERENTIAL PHASE TRACKING LPF PIN: The external capacitance is connected between CN.
CN — DIFFERENTIAL PHASE TRACKING LPF PIN: The external capacitance is connected between CP.
LCP — LENS SHIFT OFFSET CANCEL LPF PIN: The external capacitance is connected between LCN.
LCN — LENS SHIFT OFFSET CANCEL LPF PIN: The external capacitance is connected between LCP.
MP — MIRR TOP HOLD PIN: The external capacitance is connected to VPB.
MB — MIRR BOTTOM HOLD PIN: The external capacitance is connected to VPB.
MEV — RFDC BOTTOM ENVELOPE PIN: The external capacitance is connected to VPA.
MLPF — MIRROR LPF PIN: An external capacitance is connected to VPB.
TPH — PI TOP HOLD PIN: An external capacitance is connected to VPB.
VC — REFERENCE VOLTAGE OUTPUT: This pin provides the DC bias reference voltage (VPB/2). Output impedance is less
than 50 Ω.
V125 — REFERENCE VOLTAGE OUTPUT: DC bias voltage output and it is also used for servo output reference. (V25/2)
RX — REFERENCE RESISTOR INPUT: An external 12.0 k&, 1 % resistor is connected from this pin to ground to establish a
precise PTAT (proportional to absolute temperature) reference current for the fi lter.
Q101 : CXD1881R
1
DVDRFP
AT T
2 MUX
DVDRFN
RFS I N
6 3
2 ATT
I NPUT
I NPUT I MP
SEL
SEL
A W / LPF
A 1 2 GCA
B W / LPF
CD_ A 1 6 GCA
C W / LPF
B 1 1 GCA
D W / LPF
CD_ B 1 5 GCA
MUX
C 1 0 GCA
CD_C 1 4 GCA
D 9 GCA
CD_D 1 3 GCA
1 2 dB i s a d d e d
CD / DVD
@ h i g h g a i n mo d e
6 dB i s a d d e d
@ h i g h g a i n mo d e
CD_ E 1 8 GCA
CD_ F 1 7 GCA
3
FROM
S - PORT
3
A 2 GCA EQ
4
B 2 GCA EQ
C2 5 GCA EQ
D2 6 GCA EQ
3
3
FROM
S - PORT
1 2 dB i s a d d e d
@ h i g h g a i n mo d e
APC SE L
DVD / CD
F r om S - p o r t
LD H / L
2 3
DVDPD
Du a l APC
2 4
CDPD
2 6 2 2
6 2 6 1 6 0 5 9
AGC
PROGRAMMAB L E
I NPUT
B I AS
D I F FERENT I ATOR
4
2
I NPUT I MP
SEL
SSOUT
C l amp
& E n v
2 L e v e l
S I GDET
DAC
B +D
SUM
4 d B
Amp .
GCA
A +C
1 2 dB i s a d d e d
@ h i g h g a i n mo d e
A +D
B +C
TOPHOLD
3
FROM
TOPHOLD
S - PORT
+ 3 d B
4 d B
GCA
4
FROM
S - PORT
Comp .
PHASE
DETECTOR
PHASE
DETECTOR
VC
M i r r g a i n
S i n k c u r r e n t
F r om S - p o r t
F r om S - p o r t
2
I n p u t l mp
2
F r om S - p o r t
P l l 2
AGCO
BOT TOM
I NPUT
ENVELOPE
BUF F
MUX
2 1 5 0 3 2 3 1
5 3 5 2 5 5 5 4 5 7
EQUA L I ZER
FUL L WAVE
F I L TER
RECT I F I ER
OUTPUT I NH I B I T
FROM S - PORT
AGCO
FROM
S - PORT
5
7 0 k H z
O f f s e t
L PF
c a n s e l
FROM
4
S - PORT FROM
5
S - PORT
7 0 k H z
O f f s e t
L PF
c a n s e l
BCA DET TOPHLD
DAC
FROM
2
S - PORT
Bu f f
- 6d B @ n o r ma l
O f f s e t
GCA
c a n s e l
6 dB
6 d B , 4 b i t
4
Amp
FROM
P I
S - PORT
FE
TE
CE
V2 5
V1 2 5
V2 5 / 3
LPF
3
CE - AT T
ATT
Po l s e l .
CEPOL
b u f f ( -12 d B )
MUX SUB
O f f s e t
L PF
c a n s e l
6
FROM
CD / DVDCP / CN CEFDB S - PORT
L ow l mp
f o r s e r v o o u t p u t r e f .
V C I f o r s e r v o i n p u t
CONTROL
S i g n a l s
T o e a c h b l o c k
SER I A L PORT
Comp
REG I STER
D i s k d e t & h y s & o f f s e t
F r om S - p o r t
M i r r L PF
F r om S - p o r t
M I RR
COMP
PEAK /
L I NKEN
BOT TOM
HOLD
I n t e r n a l
FDCHG
3 0 2 8 2 9 3 3 2 7
31
AGC HOLD
FAST A t t a c k o f f
AGC
CHARGE
PUMP
5 6
BYP
4 9
RX
6 d B , 4 b i t
GCA 4 0
FE
P l l
3 8 P I
3 5 TPH
COMP
SE L
3 4
DF T
6 1
RFDC
4 1
CE
4 2 MNTR
MNTR
Cn t r l
4 4 LCP
4 3
LCN
SE L
HLDEN
7
CP
8
CN
TE
GCA 3 9 TE
RST
3
FROM
S - PORT
3 7
V 2 5
V2 5 /2
3 6 V 1 2 5
VC=VPB / 2 2 0
VC
4 8
SDEN
4 7 SDATA
4 6
SCL K
V 3 3 f o r
4 5 V 3 3
o u t p u t b u f f
5 8 1 9 5 1 2 5