Marantz SA17S1 Service Manual page 20

Q101 : CXD1881R
Pin Description
Power Supply Pins
Name Type Description
VPA — Power supply pin for the RF block and serial port
VPB — Power supply pin for the servo block
VNA — Ground pin for the RF block and serial port
VNB — Ground pin for the servo block
V33 — Power supply pin for the output buffers
V25 — Reference power supply for the servo output
Input Pins
Name Type Description
DVDRFP, DVDRFN I
RFSIN I
AIP, AIN I
DIP, DIN I
A, B, C, D I
A2, B2, C2, D2 I
CD_A, B, C, D I
CD_E, F I
MIN I
DVDPD I
CDPD I
LDON I
LINK I
Output Pins
Name Type Description
ATOP, ATON O DIFFERENTIAL ATTENUATOR OUTPUTS: Attenuator outputs.
FNP, FNN O DIFFERENTIAL NORMAL OUTPUTS: Filter normal outputs.
RFAC O SINGLE-ENDED NORMAL OUTPUT: Single-ended RF output.
RFDC O RF SIGNAL OUTPUT: Single-ended RF summing output reference to VPB-2.4 (V).
FE O FOCUSING ERROR SIGNAL OUTPUT: Focus error output reference to V125.
TE O TRACKING ERROR SIGNAL OUTPUT: Tracking error output reference to V125.
CE O CENTER ERROR SIGNAL OUTPUT: Center error output reference to V125.
MEVO O RFDDC BOTTOM ENVELOPE OUTPUT: Bottom envelope, PI or bottom clamped RF envelope signal output for
mirror detection.
DFT O DEFECT OUTPUT: CMOS output (V33 or VPB). When the PI signal level is below the detection level or when
the RF signal level is below the detection level, the DFT output goes high. This output is selected by serial port.
MIRR O MIRROR DETECT OUTPUT: Mirror detect comparator output. CMOS output (V33 or VPB).
PI O PULL-IN SIGNAL OUTPUT: The summing signal output of A, B, C, D, or CD_A, B, C, D. Reference to V25/3.
DVDLD O APC OUTPUT: DVD APC output pin to control the laser power.
CDLD O APC OUTPUT: CD APC output pin to control the laser power.
MNTR O MONITOR OUTPUT: Monitor output signal is selected by PIOR bit7-5.
Serial Port Pins
Name Type Description
SDEN I SERIAL DATA ENABLE: Serial enable CMOS input. A high level input enables the serial port. (not to be left open)
SDATA I/O SERIAL DATA: Serial data bidirectional CMOS pin(V33 or VPA). NRZ programming data for the internal registers is
applied to this input. (not to be left open)
SCLK I SERIAL CLOCK: Serial clock CMOS input. The clock applied to this pin is synchronized with the data applied to SDATA.
(not to be left open)
RF SIGNAL INPUTS: Differential RF signal attenuator input pins.
RF SIGNAL INPUT: Single-ended RF signal attenuator input pin.
AGC AMPLIFIER INPUTS: Differential AGC amplifi er input pins.
ANALOG INPUTS FOR RF SINGLE BUFFER: Differential analog inputs to the RF single-end output buffer
and full wave rectifi er.
PHOTO DETECTOR INTERFACE INPUTS: Inputs from the main beam photo detector matrix outputs.
PHOTO DETECTOR INTERFACE INPUTS: AC coupled inputs for the DPD from the main beam photo
detector matrix outputs.
CD PHOTO DETECTOR INTERFACE INPUTS: CD_A, B, C, D come from the CD main beam photo detector
matrix outputs.
CD PHOTO DETECTOR INTERFACE INPUTS: CD side beam photo dector outputs and used for the CD
tracking detection.
RF SIGNAL INPUT FOR MIRROR: AC coupled inputs for the mirror dection circuit from MEVO.
APC INPUT: DVD APC input pin from the monitor photo diode.
APC INPUT: CD APC input pin from the monitor photo diode.
APC OUTPUT ON/OFF: APC output control pin. A high level activates LD output. (open low)
LINKING SIGNAL INPUT PIN: In the linking area, this pin goes high and the Mirror and TE outputs are
disabled, when the link signal is enabled. (open low)
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