Single-Instruction Processing; Single-Cycle, Display, And Store; Operations - IBM System 360 Operating Manual

PSW Field Local Storage Address (Hexadecimal)
System Mask B8
Protection Key B9 (high-order four bits). The
protection key can also be dis-
played from the Q-register.
AScn
Mode B9 (bit 4)
Machine-Check
Mask B9 (bit 5)
PSW Field Local Storage Address (Hexadecimal)
Wait State B9 (bit 6)
Problem State B9 (bit 7)
Inte rru ption
Code
Instruction Length
Code
Condition Code
Program Mask
Instruction
Address
(available in old PSW in main
storage, bits 16 through 31).
8C (can also be decoded from the
two high-order bits of the G
register).
BB (high-order four bits) This
is in a four-bit code to corre-
spond to the branch-on-condition
mask.
BB (low-order four bits)
(available in IJ register)
SINGLE-INSTRUCTION PROCESSING
One method that can be used to debug programs is
to process one instruction at a time, service all
interruptions, and stop. The next instruction
address is then displayed in the B- and A-register
display.
To process one instruction at a time:
1. Press the Stop key (if necessary to stop proc-
cesing), wait for the Manual light to come on,
and then set the Rate switch to the instruction
step position (see Figure 2).
2. Press the Start key to process each instruction
and service all pending interruPtions.
When this procedure is used, the program is run
basically in the same way as during normal proc-
24
cessing exce pt that the operation is much slower.
Data exchanged between the CPU and I/O devices
is not lost when the Rate switch is used as just
dewibed. Note, however, that I/O interruptions
may occur at different times in the sequence of
instructions being processed in single-cycle mode
as contrasted with normal instruction processing.
That is, an I/O interruption indicating completion
of an I/O operation for a relatively slow I/O unit
may occur before the start key is pressed for exe-
cution of the next instruction. In normal program
processing this interruption may occur after several
other instructions have been processed. If this
difference in time-of-occurrence of an interruption
can affect expected program results, a segment
of the program should be run (for check-out pur-
poses) rather than only one instruction at a time.
When the CPU stops, the address of the next
instruction to be processed is displayed in the B-
and A-register indicators.
SINGLE-CYCLE, DffiPLAY, AND STORE
OPERATIONS
Although single-cycle operations are intended
primarily for Customer Engineering use, you may
wish to examine the contents of, or store information
into, various registers. An instruction can be proc-
essed one machine-cycle at a time and the system
stopped after the cycle is completed. To perform
this operation:
1. Use the procedure described under Single-
Instruction ProceSSing to arrive at the desired
instruction. The address of the next instruction
to be processed is displayed in the B- and A-
registers (Part 2 of Figure 4).
2. Place the rate switch in the single-cycle position
(see Figure 2).
3. Press the start key once for each machine cycle
desired.
At the completion of any machine cycle you can
display or store information. (Note that the methods
of storing or displaying storage data are presented
in other sections of this publication.) The selection
is made with the Display-Stor-Sel switch (switch E):
1. With the Manual light on, set the display-storage-
select switch to the desired location.
2. For display of the selected location, press the
Dis play key.