ARM DSTREAM-ST Getting Started Manual page 28

Check list
Is debugging disabled in the target SoC?
Is the target's operating system disabling the debug interface
during the boot process?
Is the connection attempting to load an image into the target SoC
while the cores are running?
Is the target's VTRef signal detected by DSTREAM-ST?
Does the DEBUG LED flash when trying to initiate the target
connection?
Is the connection a simple Connect Only connection in the DS-5
debug configuration for your target?
Is the Clock Speed (Hz) in the platform configuration set
correctly?
Are the nTRST and nSRST signals linked on the target?
Is initialization resets putting the target into an unwanted state?
In the DS-5 debug configuration for the target, does the Target
Connection option match the debug unit?
Does the platform configuration settings for your target specify
the correct debug interface mode?
Is an SWD connection being attempted with hardware which only
supports JTAG?
Are trace capture options correctly set?
ARM 100892_0100_00_en
Things to check
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4 Troubleshooting ARM
4.1 Troubleshooting your DSTREAM-ST unit
Table 4-1 Troubleshooting checklist (continued)
Some targets disable debugging facilities for security
purposes. Check if debugging is enabled on your target.
Try connecting and stopping the target immediately after
power up.
Try postponing the boot process using a serial connection to
the target.
Try halting the cores through a bare-metal connection first.
Check if the TARGET LED on the DSTREAM-ST unit is
glowing steady green.
Check if the host software is communicating with the correct
debug unit.
If using DS-5, try using the Identify button available in either
the Debug Hardware Firmware Installer
Hardware Configure IP view to identify and ensure that the
correct debug unit is used.
A simple Connect Only connection is useful to verify the
connection to the hardware. This type of connection usually
does not run any scripts or load any images on the target. To
start debugging, set the connection as either Debug from
entry point or Debug from symbol in the debug
configuration.
Problems might occur if the clock speed is set too high. Try
setting the clock speed to lower frequencies in adaptive and
non-adaptive clocking modes.
Try enabling Linked_SRST_TRST in the Probe
Configuration tab in Platform Configuration Editor
available in DS-5.
Try disabling TResetOnInitConnect and
AllowICETAPReset in the Probe Configuration tab in
Platform Configuration Editor available in DS-5.
Check if DSTREAM-ST is selected as the Target Connection
option in the Connection tab of the debug configuration for
your target.
Check if the LVDS Debug Interface mode is set correctly in
the platform configuration settings for your target.
Check and correct the connection setting. Even if the SoC
supports SWD, there might be buffers on the target board
which prevent bi-directional data on the TMS signal.
Check that the trace capture settings used for the debug
configuration are set correctly.
DSTREAM-ST
®
view or the Debug
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