Table of Contents
Advertisement
4.6.1. Errors!
Chances are you're going to make a mistake at some point along the way. If not in this tutorial, someday, you will make a mistake
and get a compiler error, sorry. In this case one of your build steps will have a red X next to it. The X isn't entirely helpful to a
beginner. It does tell you which build step failed and to the trained developer this can greatly narrow the scope of what's gone wrong.
More often though you will immediately query the error log to find out what's going on.
For example, if you try to recompile your design with an extra comma in your module definition (immediately after LEDOutput1 and
before then module definition's end parentheses...) the error tab yields this relatively clear message:
The problem is indeed on line 26, this is an easy one to find and fix if you know Verilog.
If you get errors, don't fret. This is normal. It happens all the time. Read the error message carefully and try to understand what the
compiler isn't happy about. Non-developers tend to forget this but error messages are designed to point you to the problem so you can
resolve it! Imagine a world without error messages!
You will find that when you're new to a programming language, working through compiler errors teaches you about what's allowed
and what's not allowed slowly, but effectively. However, in general, it's advisable to save yourself some headache, buy a beginners
book on the langue and power through it before taking on any serious projects.
5. Run Your Project
If you've gotten this far it means you've created your very own FPGA design in the Xilinx ISE. You've added a Verilog HDL
module to the design, constrained it, compiled it and now you're ready to run it!
But before you do, you need to generate the programming "binary" file that gets downloaded to the target. Simply double click the
build step called "Generate Programming File" in the Process view (it's directly under Place & Route).
When this finishes successfully, open Windows Explorer and navigate to the folder where you've saved your project files. In this
folder you will see a .bit file with the same name as your top-level module, "Mark1Starter_TopLevel.bit" in this tutorial's case.
This bit file can be used to configure the FPGA as described above in the section
Essentially you plug your Mark 1 into a USB port on your computer. When the Mark 1 appears in the Windows Explorer as a
removable disk, copy and paste the Mark1Starter_TopLevel.bit file onto the removable disk. Once it's on the removable disk, change
the file's name to "config.bit."
Figure 21 – Console Output at the End of a Successful Build
Figure 22 – Syntax Error Found During Synthesis
Running a Pre-Compiled Design on the Mark 1.
P a g e
| 15
Advertisement
Table of Contents
