ValentFX Mark 1 FPGA Starter Manual page 16

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a.
Translate – The NGDBUILD software tool is used to translate the netlist from using the UNISIM library to the
SIMPRIM library.
b.
Map – the MAP software tool is used to take the SIMPRIM primitives and decide how the chip's physical resources
(flip-flops, BRAMs, Multipliers, LUTs etc.) will be used.
c.
Place and route – the PAR software program runs a lot of computation to layout where all the chips resources will be
used and how the design components get placed, routed and interconnected.
3.
Generate Programming File – The final step takes the output from the previous steps and puts them together into a single
binary that can be used to program the device.
The ISE Project Navigator has an entire window pane dedicated to this process. This is because when designs get very large these
discrete steps can take hours! An engineer would not like to have to re-run every step of the compilation process if it's not necessary.
The following view can be used to explicitly run individual steps of the build process and see the status of what's currently running or
even what's failed (note in order to see the following view you must have the Mark1Starter_TopLevel.v file selected in the Hierarchy
view:
Simply click the little green play button in the top left corner to compile the whole design. On a modern computer this should take
less than 2 minutes to run for this project. If the process completes without any errors you will get green check boxes next to the
major steps in the compilation process:
Also you will note the Console view pane on the bottom of the ISE will show output like the following:
Figure 19 – The Process View
Figure 20 – A Successful Build
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