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Hitachi HTDK170E Service Manual

Dvd digital theatre system
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CAUTION:
Before servicing this chassis, it is important that the service technician read the "Safety
Precautions" and "Product Safety Notices" in this service manual.
ATTENTION:
Avant d'effectuer l'entretien du châassis, le technicien doit lire les «Précautions de sécurité»
et les «Notices de sécurité du produit» présentés dans le présent manuel.
VORSICHT:
Vor Öffnen des Gehäuses hat der Service-Ingenieur die „Sicherheitshinweise" und „Hinweise
zur Produktsicherheit" in diesem Wartungshandbuch zu lesen.
SPECIFICATIONS AND PARTS ARE SUBJECT TO CHANGE FOR IMPROVEMENT
SERVICE MANUAL
MANUEL D'ENTRETIEN
WARTUNGSHANDBUCH
DVD DIGITAL THEATRE SYSTEM
July 2003
No. 0153
HTDK170E
HTDK170EUK
Data
contained
within
this
manual is subject to alteration for
improvement.
Les données fournies dans le présent
manuel d'entretien peuvent faire l'objet
de modifications en vue de perfectionner
le produit.
Die
in
diesem
Wartungshandbuch
enthaltenen Spezifikationen können sich
zwecks Verbesserungen ändern.
Service

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  Summary of Contents for Hitachi HTDK170E

  • Page 1 No. 0153 HTDK170E HTDK170EUK SERVICE MANUAL MANUEL D'ENTRETIEN WARTUNGSHANDBUCH CAUTION: Before servicing this chassis, it is important that the service technician read the “Safety Precautions” and “Product Safety Notices” in this service manual. Data contained within this Service manual is subject to alteration for improvement.
  • Page 2: General Description

    1. G ENERAL ESCRIPTION 1.1 ES60X8 The ES6008/ES6018 Vibratto DVD processor is a single-chip MPEG video decoding chip that integrates audio/video stream data processing, TV encoder, four video DACs with Macrovision. copy protection, DVD system navigation, system control and housekeeping functions.
  • Page 3 • High-Definition Compatible Digital. (HDCD) decoding. • Dolby Digital Class A and HDCD certified. • CD-DA. • MP3. 1.2 M EMORY 1.2.1 System SRAM Interface The system SRAM interface controls access to optional external SRAM, which can be used for RISC code, stack, and data. The SRAM bus supports four independent address spaces, each having programmable bus width and wait states.
  • Page 4 2. S ES6008/18 P YSTEM LOCK IAGRAM and ESCRIPTION 2.1 ES6008/18 PIN DESCRIPTION...
  • Page 10 2.1 SYSTEM BLOCK DIAGRAM System block diagram is shown in the following figure: 3. A UDIO UTPUT The ES6008 supports two-channel analog audio output while ES6018 supports six-channel analog audio output. In a system configuration with six analog outputs, the front left and right channels can be configured to provide the stereo (2 channel) outputs and Dolby Surround, or the left and right front channels for a 5.1 channel surround system.
  • Page 11: Video Interface

    IDEO NTERFACE 5.1 Video Display Output The video output section controls the transfer of video frames stored in memory to the internal TV encoder of the Vibratto. The output section consists of a programmable CRT controller capable of operating either in Master or Slave mode. The video output section features internal line buffers which allow the outgoing luminance and chrominance data to match the internal clock rates with external pixel clock rates, easily facilitating YUV4: 2:2 to YUV4: 2:0 component and sample conversion.
  • Page 12 VID_SCN_HBLANK_STOP The write-only Video Screen Horizontal Blanking Interval End Address register contains the 13-bit ending address of the horizontal blanking stop interval for the active video display. VID_SCN_VBLANK_START The Video Screen Vertical Blanking Interval Start Address register contains the 13-bit starting address of the vertical blanking interval for the active video display.
  • Page 13: Sdram Memory

    VID_SCN_ITERFACECNTL The Video Screen Interface Control register contains the control logic used to determine the signal output characteristics to the video display. VID_SCN_RESETS The Video Screen Reset register contains the control logic for reset events, including the reset pan and scan, horizontal filtering and DMA enabling functions. This register is set to 1 on reset. VID_SCN_STATUS The Video Screen Status register contains the status bits for the video section.
  • Page 14: Flash Memory

    Typical SDRAM Configurations: The memory interface controls access to both external SDRAM or EDO memories, which can be the sole unified external read/write memory acting as program and data memory as well as various decoding and display buffers. At high clock speeds, the Vibratto memory bus interface has sufficient bandwidth to support the decoding and displaying of CCIR601 resolution images at full frame rate.
  • Page 15: Miscellaneous Functions

    9 ATA/IDE LOADER INTERFACE The host interface can directly support ATAPI devices such as DVD drives or I/O controllers. PIO modes 0 through 4 are supported. The ATA/IDE interface can directly control two devices through the use of the HCS1FX# and HCS3FX# signals. The ATA/IDE interface of the Vibratto uses a command execution protocol that allows the operation of audio-CD and DVD loaders to coexist on the same type of interface cable that most computers use for CD loaders and hard disk drives.
  • Page 16 There are 7812, 7805 and LM317 linear regulator ICs on the power supply to generate +5V, -5V, +12V, -12V and +3.3V for the device. On the standby mode just +12Vst and +5V supplies are generating for standby power consumption. The ES6008/18 requires 2.5V to operate. This voltage is generated from +5V. 13 C ONNECTORS 13.1 ATAPI D...
  • Page 17 Table A.1 - 40-pin connector interface signals Signal name Connector Conductor Connector Signal name contact contact RESET- Ground DD10 DD11 DD12 DD13 DD14 DD15 Ground (keypin) DMARQ Ground DIOW- Ground DIOR- Ground IORDY CSEL DMACK- Ground INTRQ reserved PDIAG- CS0- CS1- DASP- Ground...
  • Page 18 11 à Green 12 à Comms Data 1 13 à Red Gnd 14 à Comms Data Gnd 15 à Red 16 à Fast Blanking 17 à Video Gnd 18 à Fast Blanking Gnd 19 à Composite Video In 20 à Composite Video Out 21 à...
  • Page 19: Circuit Description

    IC500 8051 Micro Controller's Main Functions: There are 2 main functions of the IC500 8051 micro controller; signal switching and standby controlls. IC500 communicates with ES80X6 microcontroller by using I C bus. (AUX0, AUX1 signals) Multiplexer (MUX) control signals for signal switching supplied by IC500. These MUX signals are using the select signal sources and input-output signals.
  • Page 20: Front Panel

    • Voltages on the secondary side are as follows: +20 Volts at D811, +10 Volts at D808, +14V at D810, -22 Volts at D812, +12Vst at Q804. • Using the output of the D808, a photo diode inside of the IC803 generates feedback signal bu using optocoupler's photo transistor.
  • Page 21 • There are 1 DOUBLE SCART connector PL300 (Scart1 is for input on Scart mode and Scart2 is for TV output), 3 pieces RCA audio jacks (L,R, Active Subwoofer) for audio output, 3 pieces RCA A/V jacks for CVBS,L,R inputs on AV mode, 1 RCA connector for CVBS out, 1 Connector for SVHS output.
  • Page 35 Sch_A_Input RIGHTA RIGHTA RIGHTA RIGHTB RIGHTB RIGHTB LRCK LFE_A RIGHT+ LRCK LRCK LFE_A LFE_A RIGHT+ BICK LFE_B RIGHT- BICK BICK LFE_B LFE_B RIGHT- LFE+ LFE + LFE- LFE - PWRDWN PWRDWN PWRDWN EAPD1 POWER_ON_RST POWER_ON_RST POWER_ON_RST TWARN1 TWARN1 EAPD1 EAPD1 Sch_RightCh_Sub_Out TWARN1 TWARN1...
  • Page 36 INPUT CONNECTOR LRCK BICK TWARN1 TWARN2 TWARN3 PWRDWN POWER_ON_RST 87256-1611 +3.3V +20V POWER C101 100NF 100NF JS-1120-04 100UF Y 5V 6.3V Title 5.1 CHANNEL SCHEMATIC INPUT CONNECTOR Size Document Number 150-0000-001 Date: Thursday , February 14, 2002 Sheet...
  • Page 37 +3.3V 2.2UF 6.3VDC 100NF PWRD WN EAPD1 CENTERA SDI0 = L, R SDI1 = LS, RS SDI2 = C, SUB CENTERB SDI_1/SDATA_OUT SLEFT_B +3.3V SD I_2/SDATA_IN VD D_4 +3.3V LRCK LRCKI/SYNC GN D_4 BICK LEFTA BCKI/BIT_CLK LEFT_A 100NF LEFTB VD D_1 LEFT_B RIGHTA GN D_1...
  • Page 38 +3.3V 2.2UF 6.3VDC 100NF EAPD2 PWDN SLEFTA SLEFTB SDI0 = L, R SDI1 = LS, RS SDI2 = C, SUB SDI_1/SDATA_OUT SLEFT_B +3.3V SDI_2/SDATA_IN VDD_4 +3.3V LRCK LRCKI/SYNC GND_4 BICK BCKI/BIT_CLK LEFT_A 100NF VDD_1 LEFT_B GND_1 RIGHT_A POWER_ON_RST RESET RIGHT_B 100NF AC97_MODE VDD_3...
  • Page 39 L3 22uh CENTER+ IND-22UH-CT622LY 100NF +20V GNDREF 1000UF 100NF 1000PF 25VDC 0000-1206 0000-1206 GNDR1 OUTPL CENTER+ 470NF 100NF VREG1 OUTPL 8 OHM FILM 100NF CENTER- VREG1 VCC1P 330PF 100NF +3.3V PGND1P 0000-1206 CONFIG PGND1N 100NF 1000PF PWRDN VCC1N 100NF 0000-0805 EAPD1 TRI-STATE OUTNL...
  • Page 40 L11 22uh SLEFT+ IND-22UH-CT622LY 100NF +20V GNDREF 1000UF 100NF 1000PF 25VDC 0000-1206 0000-1206 SLEFT+ GNDR1 OUTPL 8 OHM 100NF 470NF VREG1 OUTPL 100NF FILM SLEFT- VREG1 VCC1P 330PF 100NF +3.3V PGND1P 0000-1206 CONFIG PGND1N 100NF 1000PF PWRDN VCC1N 0000-0805 100NF EAPD2 TRI-STATE OUTNL...
  • Page 41 L7 10uH LFE + IND-10UH-CT622LY 100NF +20V GNDREF 1000UF 100NF 1000PF 25VDC 0000-1206 0000-1206 GNDR1 OUTPL LFE + 100NF 470NF VREG1 OUTPL 4 OHM 100NF FILM LFE - VREG1 VCC1P 330PF 100NF +3.3V PGND1P 0000-1206 CONFIG PGND1N 100NF 1000PF PWRDN VCC1N 0000-0805 100NF...
  • Page 42 PT1201 SPEAKER Title 5.1 CHANNEL SCHEMATIC OUTPUT CONNECTOR Size Document Number 150-0000-001 Date: Friday , February 15, 2002 Sheet...
  • Page 53 THE UPDATED PARTS LIST FOR THIS MODEL IS AVAILABLE ON ESTA...
  • Page 54 Fax: 93 491 3513 Fax: +49- 89-991 80-224 Email: atencion.cliente@hitachi-eu.com Hotline: +49-180-551 25 51 (12ct/min) Email: HSE- DUS.service@hitachi-eu.com HITACHI EUROPE srl HITACHI HOME ELECTRONICS (NORDIC) AB Via Tommaso Gulli N.39, 20147 Box 77 S-164 94 Kista Milano, Italia SWEDEN ITALY...

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