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Super X11SPM-F/-TF/-TPF User's Manual
IIO Configuration
EV DFX Features
When this feature is set to Enable, the EV_DFX Lock Bits that are located on a proces-
sor will always remain clear during electric tuning. The options are Disable and Enable.
CPU1 Configuration
IOU0 (II0 PCIe Br1)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU1 (II0 PCIe Br2)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
IOU2 (II0 PCIe Br3)
This item configures the PCI-E port Bifuraction setting for a PCI-E port specified by the
user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.
CPU1 SLOT4 PCI-E 3.0 X16 / CPU1 SLOT6 PCI-E 3.0 X16 / CPU1
SLOT7 PCI-E 3.0 X8
Link Speed
Use this item to select the link speed for the PCI-E port specified by the user. The
options are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).
The following information will also be displayed:
•
PCI-E Port Link Status
•
PCI-E Port Link Max
•
PCI-E Port Link Speed
PCI-E Port Max Payload Size
Selecting Auto for this feature will enable the motherboard to automatically detect
the maximum Transaction Layer Packet (TLP) size for the connected PCI-E device,
allowing for maximum I/O efficiency. Selecting 128B or 256B will designate maximum
packet size of 128 or 256. The options are 128B, 256B, and Auto.
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