Introduction - Keithley KPXI User Manual

Section 5: Utilities

Introduction

This section explains extended function of the Model KPXI-CON controller (watchdog timer WDT).
Watchdog timer overview
The Model KPXI-CON controller has two different type watchdog timers (WDT), one is integrated
into the south bridge 6300ESB and another is integrated into the super I/O W83627HF. The
primary function of the WDT is to monitor the Model KPXI-CON controller operation and to
generate IRQs and send a signal to PXI Trigger or reset the system if the software fails to function
as programmed. The major features of the watchdog timer are:
1. Enabled and disabled through software control
2. Armed and strobed through software control
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Intel 6300ESB ICH watchdog timer
The Intel
ranging from one micro second to ten minutes. The timer uses a 35-bit Down-Counter. The
counter is loaded with the value from the first Preload register. The timer is then enabled and starts
counting down. The time at which the WDT first starts counting down is called the first state. If the
host fails to reload the WDT before the 35-bit down counter reaches zero the WDT generates an
internal interrupt. After the interrupt is generated, the WDT loads the value from the second
Preload register into the WDT's 35-bit Down-Counter and starts counting down. The WDT is now
in the second stage. If the host still fails to reload the WDT before the second timeout, the WDT
drives the WDT_TOUT# pin low. The WDT_TOUT# pin is held low until the system is reset. Users
can choose to reset the system or send a PXI Trigger signal through BIOS WDT setting.
Figure 5-1
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Intel 6300ESB Watchdog Timer architecture
5-2
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6300ESB ICH includes a two-stage Watchdog Timer (WDT) that provides a resolution
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KPXI System Controller User's Manual
KPXI-CON-900-01 Rev. A / January 2007