And U.2 Slot Breakdown (Kaby Lake-X) - EVGA X299 DARK Owner's Manual

EVGA X299 DARK (151-SX-E299)
M.2 and U.2 Slot Breakdown (Kaby Lake-X)
PCIe Lane Distribution (Core
77xx, 16 Lane Processors)
U.2(PU1) x4 PCI-E Gen 3 lanes (Shared with M.2 Key-M 110mm PM1)

o Cannot be enabled when SLI is used
o This U.2 has two requirements to enable:


U.2(PU2) not supported on Kaby Lake-X

o U.2(PU2) is disabled when using 16 or 28 Lane CPUs
M.2 Key-M (110mm) PM1 – x4 CPU lanes (PCIe/NVMe only)

o Cannot be enabled when SLI is used
o This M.2 has two requirements to enable:


M.2 Key-M (80mm) PM2 – x4 PCH lanes (Optane

o Must be enabled in BIOS, which disables PE6
M.2 Key-E (32mm) PE – x1 PCH lane

 Use of U.2 or M.2 Key-M devices disables SLI. Use of 2
M.2 Key-M slots or a single M.2 Key-M and U.2 will leave
PE2 with x8 lanes as the ONLY GPU slot.

This motherboard does NOT have any lane replication via PLX; all lanes are
native and derived from CPU or PCH.
backwards compatibility for Gen 2 devices.
PE1 cannot be populated
Must be enabled in BIOS, which disables M.2 Key-M 110mm
PM1
PE1 cannot be populated
Must be enabled in BIOS, which disables U.2(PU1)
™
i5-76xx and i7-
/PCIe/NVMe)
™
This also allows for improved
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