Table 5-6 shows the signal assignment to FMC connector.
Table 5-6
The Signal Assignment to FMC Connector
Pin#
Signal
FMC_LOC
C 30 SCL
SCL
C 31 SDA
SDA
C 34 GA0
GA0
D 35 GA1
GA1
When DA1 is mounted (otherwise N.C.)
K 14 DA1_SEL0 HA10_N
K 13 DA1_PD
HA10_P
F
4
DA1_CLK
HA00_P_CC I
K 7
DA1_B0
HA02_P
K 8
DA1_B1
HA02_N
J
6
DA1_B2
HA03_P
J
7
DA1_B3
HA03_N
F
7
DA1_B4
HA04_P
F
8
DA1_B5
HA04_N
E 6
DA1_B6
HA05_P
E 7
DA1_B7
HA05_N
K 10 DA1_B8
HA06_P
K 11 DA1_B9
HA06_N
J
9
DA1_B10
HA07_P
J
10 DA1_B11
HA07_N
F
10 DA1_B12
HA08_P
F
11 DA1_B13
HA08_N
E 9
DA1_B14
HA09_P
E 10 DA1_B15
HA09_N
When DA0 is mounted (otherwise N.C.)
C 15 DA0_SEL0 LA10_N
C 14 DA0_PD
LA10_P
D 8
DA0_CLK
LA01_P_CC I
H 7
DA0_B0
LA02_P
H 8
DA0_B1
LA02_N
G 9
DA0_B2
LA03_P
G 10 DA0_B3
LA03_N
H 10 DA0_B4
LA04_P
H 11 DA0_B5
LA04_N
D 11 DA0_B6
LA05_P
D 12 DA0_B7
LA05_N
C 10 DA0_B8
LA06_P
C 11 DA0_B9
LA06_N
H 13 DA0_B10
LA07_P
H 14 DA0_B11
LA07_N
G 12 DA0_B12
LA08_P
G 13 DA0_B13
LA08_N
D 14 DA0_B14
LA09_P
D 15 DA0_B15
LA09_N
RFM-DACNF01-P500MH
I/O Function
I
I2C Clock
I/O I2C Data
I
I2C Address 0
I
I2C Address 1
I
DA1 segment shuffling Mode Select
I
DA1 Power Down
DA1 Clock Input
I
DA1 Data 0 (LSB)
I
DA1 Data 1
I
DA1 Data 2
I
DA1 Data 3
I
DA1 Data 4
I
DA1 Data 5
I
DA1 Data 6
I
DA1 Data 7
I
DA1 Data 8
I
DA1 Data 9
I
DA1 Data 10
I
DA1 Data 11
I
DA1 Data 12
I
DA1 Data 13
I
DA1 Data 14
I
DA1 Data 15 (MSB)
I
DA0 segment shuffling Mode Select
I
DA0 Power Down
DA0 Clock Input
I
DA0 Data 0 (LSB)
I
DA0 Data 1
I
DA0 Data 2
I
DA0 Data 3
I
DA0 Data 4
I
DA0 Data 5
I
DA0 Data 6
I
DA0 Data 7
I
DA0 Data 8
I
DA0 Data 9
I
DA0 Data 10
I
DA0 Data 11
I
DA0 Data 12
I
DA0 Data 13
I
DA0 Data 14
I
DA0 Data 15 (MSB)
- 7 -
Hardware Reference Manual
Remarks
Set High to Activate
Set Low for normal operation
Set High to Activate
Set Low for normal operation
ver.10