To Verify That The Chip Select Line Of A Memory Chip Is Strobed After The Address On The Address Bus Is Stable - HP 16500B User Manual

Logic analysis system
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on the address bus is stable
To verify that the chip select line of a memory chip is
strobed after the address on the address bus is stable
Select the timing analyzer Trigger menu.
1
Define a term called ADDRESS to represent the address in question
2
and the Edge1 term to represent the asserting transition on the chip
select line.
You can rename the Edge1 term to suit the problem, for example, to
MEM_SEL.
Under Timing Sequence Levels, enter the following sequence
3
specification:
Find "ADDRESS" > 80 ns
TRIGGER on "MEM_SEL" 1 time Else on "≠ ADDRESS" go to level 1
Verifying Setup Time for Memory Address
Triggering
To verify that the chip select line of a memory chip is strob
117

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