Motorola ASTRO XTS 5000 Detailed Service Manual page 59

3-20
The devices on the SPI A bus include the PCIC and FracN IC on the SPICS4 (R131), the Abacus III
IC on SPICS5 (R126), an analog-to-digital converter (ADC) on SPICS6 (R133), and the serial
EEPROM on SPICS7 (R132). The two SPI B chip selects are for the GCAP II IC U501 on SPICS2
(R539) and the Flipper IC U301 on SPICS3. On the NNTN4563, NNTN4819, and NNTN4717
VOCON boards, two additional SPI chip select lines are used for the display: SPICS0 (R442) and
SPICS1 (U407 pin 14). On NNTN5567, one SPI B chip select is used for the MAKO IC U501 on
SPICS2 (TP_MAKO_CE). See Section
more information on MAKO IC U501. All of the SPI module lines operate at GPIO voltage logic
levels.
There are several devices on the transceiver board that only have one bi-directional SPI data line.
Components U404, U405, and U406 are configurable by MCU GPIO pin TOUT13 (MISOA_SEL) to
route the data line to the appropriate pin on the Patriot IC depending on which SPI device is being
accessed.
Universal Asynchronous Receiver/Transmitter (UART)
The Patriot IC has two Universal Asynchronous Receiver/Transmitter (UART) modules. UART1
handles the RS232 lines while UART 2 is connected to the SB9600 lines. Each UART has a receive
data line (URXD), a transmit data line (UTXD), and hardware flow control signals (RTS–request to
send) and (CTS–clear to send). All UART lines operate at GPIO voltage logic levels. The translation
to 5 V logic levels for the accessory side connector is discussed in the Flipper section.
One-Wire Interface
The MCU has a One-Wire Interface module that is used to communicate to a One-Wire device like a
USB cable or a smart battery using the Dallas Semiconductor protocol. This module has one
external pin, OWIRE_DAT (Q504 pin 2), and it uses a GPIO voltage logic level.
3.2.2.1.2 Digital Signal Processor (DSP)
The DSP portion of the Patriot IC has 84k x 24 bits of program RAM and 62k x 16 bits of data RAM.
The DSP has its own set of peripherals including the Baseband Interface Port (BBP), the DSP Timer
module, and the Serial Audio CODEC Port (SAP). Additionally, the DSP shares some peripherals
with the MCU, including the USB interface and the General Purpose Input/Output module (GPIO).
Baseband Interface Port (BBP)
The Baseband Interface Port (BBP) module is the DSP's serial synchronous interface (SSI) to the
transceiver board. The BBP has independent sections for the receiver and the transmitter. The
receiver BBP pins include the receive data pin SRDB (R121), the receive clock signal pin SC0B
(R124), and the receive frame synchronization (sync) signal pin SC1B (R123). The transmitter's BBP
pins include the transmit data pin STDB (R127), the transmit clock signal pin either SCKB (R125) or
SCKB (TP_SCKB) in NNTN5567, and the transmit frame sync signal pin either SC2B (R119) or
SC2B in NNTN5567. All BBP lines use GPIO voltage logic levels.
DSP Timer Module
While the BBP receive clock and frame sync signals are supplied by the Abacus III IC from the
transceiver board, the BBP transmit clock and frame sync signals are generated by the DSP Timer.
The BBP receive clock, connected to the DSP Timer input pin T10, is reference used to generate the
BBP transmit clock and frame sync signals. These two signals, along with the BBP transmit data
signal, are connected to the DAC on the transceiver board. For NNTN5567, the BBP transmit clock
and frame sync signals are generated by the MAKO IC using the 16.8MHz clock (connected to the
TCXO_IN M1 pin).
November 16, 2006
3.2.3.7 " MAKO IC U501 (for NNTN5567)," on page 3-27
Theory of Operation
: VOCON Board
6881094C31-E
for