u-blox AMY-5M Hardware Manual page 10

2.1.1.2 Base-band I/O supply voltage
In general, the digital I/Os of the base-band part are supplied with VDD_IO from the host system. The wide
range of VDD_IO allows seamless interfacing to standard logic voltage levels. VDD_IO must be supplied in any
case with a voltage in the specified range, as some CFG_xx pins are always read during system boot in order to
define the initial configuration of the receiver.
The power management unit does not supervise VDD_IO. External circuitry must guarantee that VDD_IO
is within operating specification before the system boots and that it remains within specification until
the system shuts down. See also section 2.1.1.6.
2.1.1.3 Base-band core voltages
The core voltages VDD_B and VDD_C core are generated separately, in order to enable main supply VDD_C
switch off while the back-up domain VDD_B remains alive. The core voltages are generated by means of internal
LDOs. The input voltage range of the LDOs is wide and allows the use of several types of batteries.
2.1.1.4 Backup power supply
A backup battery can be connected to supply the RTC and the backup RAM in case of power failure at the main
battery (VDD_IO). An internal switch will supply the internal VDD_B power domain in case VDD_IO drops below
the specified minimum value. VDD_IO will supply the VDD_B power domain if a sufficiently high input voltage is
detected. See also section 2.1.1.6.
Limit V_BCKP and VDD_IO to 3.6 V.
2.1.1.5 RF supply voltages
The main supply of the RF unit is 1.8 V supplied to the VDD_RF pin. Optionally, this voltage can be generated
with the internal LDO from the VDD_3V input. Depending on the application, the VDD_3V pin can be supplied
independently, or it can be connected to the V_DCDC via a filter.
VDD_RF must be a clean supply to obtain optimal performance. Since the V_DCDC current is very dynamic, a
supply filter (see Figure 3) is recommended to ensure little or no ripple on VDD_RF.
FB1
V
DCDC
Figure 3: Supply filter
2.1.1.6 Built-in supply voltage monitors
Built-in supply voltage monitors ensure that the system always operates within safe limits. The following
conditions need to be met in order for the system to run properly:
1. The core voltages VDD_C and VDD_B need to be within specification. These voltages are supervised by
internal supply monitors.
2. The RF supply voltage VDD_RF needs to be within specification.
3. If external memory is used, its supply voltage, i.e. VDD_IO, needs to be within the specification of this
part. This must be verified since there is no internal monitor of VDD_IO
With respect to points 2 and 3 listed above, the voltage that defines the lowest operational boundary condition
of the system shall be supervised at the V_RESET pin. This is usually either the TCXO supply voltage (VDD_3V) or
the RF IC supply voltage (VDD_RF). In designs using EEPROM memory it may also be VDD_IO. Normally, higher
system supply voltages take longer to rise and fall faster than lower supply voltages, e.g. if in a given application,
GPS.G5-MS5-08207-A3
V
RF
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AMY-5M - Hardware Integration Manual
Preliminary Design-in
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