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< Dual-In-Line Package Intelligent Power Module >
DIPIPM+ Series Application note
(note)
(1) The RC coupling (parts shown as broken line) at each input depends on user's PWM control strategy and the wiring
impedance of the printed circuit board.
(2) The DIPIPM signal input section integrates a 3.3kΩ(min) pull-down resistor. Therefore, when using an external
filtering resistor, please be careful to the signal voltage drop at input terminal.
Table 3-1-2 Allowable minimum input pulse width
Item
Symbol
PWIN(on)
Allowable
minimum input
PWIN(off)
pulse width
(note)
(1)
Input signal with ON pulse width less than PWIN(on) might make no response.
(2)
IPM might make no response or delayed response for the input OFF signal with pulse width less than PWIN(off).
(Delay occurs for p-side only.) Please refer the following Fig.3-1-7 of delayed response.
Fig.3-1-7 Delayed response of output operation with inputting less than PWIN(OFF) for P-side
Publication Date: September 2016
MCU/DSP
Fig.3-1-6 Control input connection
Up to 1.7 times of rated current
≤800V(for 1200V series) or
0≤V
CC
≤350V(for 600V series),
0≤V
CC
≤16.5V, 13.0≤V
13.5≤V
D
-20°C ≤Tc≤100°C,
N line wiring inductance less than 10nH
P Side Control Input
Internal IGBT Gate
Output Current Ic
Real line
Broken line : off pulse width<PWIN(off); turn on time t2
5V line
10kΩ
DIPIPM
U
,V
,W
,U
P
P
P
Fo
V
(Logic)
NC
Condition
≤18.5V,
DB
t2
: off pulse width>PWIN(off); turn on time t1
(t1:Normal switching time)
34
,V
,W
,AIN
N
N
N
3.3kΩ (min)
Min. value
1.5
Up to rated
3
current
From rated
current to 1.7
3.5
times of rated
current
t1
Unit
μs
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