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4
Internal block diagram
EXTAL
Clock oscillator
XTAL
NMI
RES
STBY
MD0
MD1
MD2
3
Vcc
6
Vss
P127/D15
P126/D14
P125/D13
P124/D12
P123/D11
P122/D10
P121/D9
P120/D8
P117
P116
P115
P114
P113
P112
P111
P110
Port 1
Bus control
Wait state
controller
H8/500
CPU
Watch dog
timer
ISP
Port 10
Data buffer
RAM 2KB
Interruption
controller
Data transfer
controller
RAM timer
Serial
communication
interface
10bit
A/D
convertor
Port 9
Port 8
9 – 8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A14
P50/A16
P51/A17
P52/A18
P53/A19
P54/IRQ0
P56/E
P57/ADTRG
P60/PW0
P61/PW1
P62/PW2
P63/TXD
P64/RXD
P65/SCK
AVcc
AVss
P70/AN0
P71/AN1
P72/AN2
P73/AN3
P74/AN4
P75/AN5
P76/AN6
P77/AN7
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