Hitachi CMP5000WXJ Service Manual page 145

TFP201A (VIDEO SLOT ST1 ASSY : IC7401)
• Panel Bus Receiver
•
Pin Assignment (Top View)
OGND
QO23
OVDD
AGND
Rx2+
Rx2±
AVDD
AGND
AVDD
Rx1+
Rx1±
AGND
AVDD
AGND
Rx0+
Rx0±
AGND
RxC+
RxC±
AVDD
EXT_RES
PVDD
PGND
RSVD
OCK_INV
•
Block Diagram
3.3 V
Internal 50-Ω
Termination
Rx2+
Rx2-
Rx1+
Rx1-
Rx0+
Rx0-
RxC+
RxC-
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Regulator
Channel 2
+
Latch
_
Channel 1
Data Recovery
+
Latch
_
Synchronization
Channel 0
+
Latch
_
+
PLL
_
3.3 V
1.8 V
CH2(0-9)
CH1(0-9)
TMDS
and
Decoder
CH0(0-9)
QO1
50
QO0
49
HSYNC
48
VSYNC
47
DE
46
OGND
45
44 ODCK
OVDD
43
42 CTL3
CTL2
41
CTL1
40
39 GND
DVDD
38
37 QE23
QE22
36
QE21
35
QE20
34
QE19
33
QE18
32
QE17
31
30 QE16
OVDD
29
28 OGND
27 QE15
QE14
26
3.3 V
RED(0-7)
QE(0-23)
CTL3
QO(0-23)
CTL2
ODCK
DE
GRN(0-7)
Panel
SCDT
CTL1
Interface
CTL3
CTL2
BLU(0-7)
CTL1
VSYNC
VSYNC
HSYNC
HSYNC
173