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SD-AT100H
PROTECT
22
DSP_SCCLK
23
DSP_ABOOT
24
DSP_INTREQ
25
DSP_SCDOUT
26
DSP_SCDIN
27
DSP_CS
28
ROM
29
W_SP_RLY
30
DSP_RESET
31
DSP_UC15
32
DSP_UC16
33
DSP_UC17
34
SDA
35
SCL
36
SPDIF
9
DIG_FUNC+B
37
1
2
3
1
2
3
_DSP_SCDOUT
VCC
1
14
2
13
3
12
_DSP_SCDIN
4
11
_DSP_INTREQ
10
5
_DSP_CS
6
9
_DSP_SCCLK
GND
8
7
IC101
74HC07AF
BUFFER AMP.
Q101
1
2
EX_CLK
3
4
5
6
MCLK
7
LRCK
8
SCLK
9
SDATA1
10
AUDATA0
11
Figure 44 BLOCK DIAGRAM (7/17)
44 43 42 41 40 39 38 37 36 35 34
RIN
XTO
XTI/EXTCLK
LIN
DVDD
ROUT1
DVSS
LOUT1
TVDD
ROUT2
IC102
TX
AK4586VQ
LOUT2
ADC/DAC/DIR
MCKO
ROUT3
CONVERTER
LRCK
LOUT3
BICK
DZF1
VCOM
SDTO
VREFH
SDTI1
12 13
14 15 16 17 18 19 20 21 22
– 44 –
_DSP_SCDIN
6
5 4
3
_DSP_SCCLK
7
EMAD7
D7
8
7
SCCLK
EMAD6
D6
9
EMAD5
D5
10
EMAD4
D4
11
CS493292
VD2
12
DGND2
13
EMAD3
D3
14
EMAD2
D2
15
EMAD1
D1
16
EMAD0
D0
17
18 19 20 21 22 23 24 25 26 27 28
33
32
31
30
29
28
27
26
25
24
23
D_+2.5V
2
1 44 43 42 41 40
39
DC
38
DD
37
39
AUDATA2
DSP_RESET
36
RESET
IC105
35
AGND
DSP
34
VA
33
FILT1
28
SCLKN2
32
FILT2
LRCLKN2
29
31
CLKSEL
30
CLKIN
29
Q102
Q103
IC106
NJM4580M
Q104
OPE AMP.
VSS
4
5
3
6
2
7
1
VDD
8
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