6-3-3 Waveform Description
When micom accesses each device sharing bus, it falls the chip select signal of corresponding chip to (/CS1:MIC3-
22, /CS2:MIC2-22, /DSPCS:DIC1-2, /DVD1CS:ZIC1-208, CSB:SIC1-10) 0 (Low) before trial.
So to speak, the bus is used by time-division as shown in Fig 6-14, 6-15, 6-16.
Two and more devices can't be accessed simultaneously.
/CS2
/DSPCS
/DVD1CS
/CSB
/WR
/RD
CH1 : CS2 (MIC2-22, EPROM CHIP SELECT)
•
CH2 : DSPCS (DIC1-2, DATA PROCESSOR CHIP SELECT)
•
CH3 : DVD1CS (ZIC1-208, A/V DECODER CHIP SELECT)
•
CH4 : SRVCS (SIC1-10, DIGITAL SERVO CHIP SELECT)
•
CH5 : WR (MIC1-89, MICOM OUTPUT WRITE SIGNAL)
•
CH6 : RD (MIC1-88, MICOM OUTPUT READ SIGNAL)
•
/CS2
/DSPCS
/DVD1CS
/CSB
/WR
/RD
CH1 : CS2 (MIC2-22, EPROM CHIP SELECT)
•
CH2 : DSPCS (DIC1-2, DATA PROCESSOR CHIP SELECT)
•
CH3 : DVD1CS (ZIC1-208, A/V DECODER CHIP SELECT)
•
CH4 : SRVCS (SIC1-10, DIGITAL SERVO CHIP SELECT)
•
CH5 : WR (MIC1-89, MICOM OUTPUT WRITE SIGNAL)
•
CH6 : RD (MIC1-88, MICOM OUTPUT READ SIGNAL)
•
Fig. 6-14
Fig. 6-15 DSP Access
Circuit Descriptions
6-9