Pioneer PDP-5000EX Service Manual page 188

1
Pin Function
A
No. F484 Pin Name
246 W6 VCCIO8
247 W7 GY1_O[5]
248 W8 GY1_O[2]
249 W9 BCB1_O[2]
250 W10 GND
251 W11 DE1_O
252 W12 GND+
253 W13 GND
B
254 W14 BCBA_O[2]
255 W15 GYA_O[7]
256 W16 GND*
257 W17 VCCIO7
258 W18 NC
259 W19 GND
260 V19 GND*
261 U19 BCBB_O[1]
262 T19 VCCIO6
263 R19 GYB_O[1]
C
264 P19 NC
265 N19 GND
266 M19 RCRB_O[0]
267 L19 H4_I
268 K19 GND
269 J19 RCR4_I[7]
270 H19 RCR4_I[2]
271 G19 VCCIO5
272 F19 GND
273 E19 GY4_I[0]
D
274 D19 BCB4_I[4]
275 D18 GND
276 D17 VCCIO4
277 D16 GY2_I[0]
278 D15 GY2_I[2]
279 D14 GY2_I[6]
280 D13 GND
281 D12 RESETX
282 D11 BCB3_I[2]
283 D10 GND
E
284 D9 GY3_I[3]
285 D8 GY3_I[7]
286 D7 RCR3_I[3]
287 D6 Y2_O[5]
288 D5 Y2_O[2]
289 E5 VCCD_PLL3
290 F5 GNDG_PLL3
291 G5 C2_O[6]
292 H5 H2_O
293 J5 NC
F
294 K5 TDI
295 L5 TDO
188
1
2
I/O
−
V+3_3V_D_FPGA1
O to Triton IN2 GY2_I5
O to Triton IN2 GY2_I2
O to Triton IN2 BCBI2_I2
−
Connect to GND
O to Triton IN2 DE2_I
−
Connect to GND
−
Connect to GND
O to Carrera SBAI (2)
O to Carrera SGAI (7)
−
N.C.
−
V+3_3V_D_FPGA1
−
N.C.
−
Connect to GND
−
Standby (probe land)
O to Carrera SBAI (1)
−
V+3_3V_D_FPGA1
O to Carrera SGAI (1)
−
N.C.
−
Connect to GND
O to Carrera SRAI (0)
I from DVI_Rx HSYNC
−
Connect to GND
I from DVI_Rx QE23/R7
I from DVI_Rx QE18/R2
−
V+3_3V_D_FPGA1
−
Connect to GND
I from DVI_Rx QE8/G0
I from DVI_Rx QE4/B4
−
Connect to GND
−
V+3_3V_D_FPGA1
I from HDMI Q8/G0
I from HDMI Q10/G2
I from HDMI Q14/G6
−
Connect to GND
I RESET input
I from AD BLUE (2)
−
Connect to GND
I from AD GREEN (3)
I from AD GREEN (7)
I from AD RED (3)
O to Triton IN4 Y4_I5
O to Triton IN4 Y4_I2
−
V+1_2_D_FPGA1_PLL
−
Connect to GND
O to Triton IN4 C4_I6
O to Triton IN4 H4_I
−
N.C.
I Configuration
O Configuration
PDP-5000EX
2
3
Pin Function
3
4
4