Pioneer PDP-5000EX Service Manual page 179

5
THC63LVD104S (FHD DIGITAL ASSY: IC3001, IC3002)
• LVDS Receiver IC
Pin Arrangement (Top view)
Block Diagram
LVDS INPUT
(8 to 112 MHz)
CMOS/TTL INPUT
5
6
RA- 49
RA+ 50
RB- 51
RB+ 52
LVCC 53
RC- 54
RC+ 55
RCLK- 56
RCLK+ 57
LGND 58
RD- 59
RD+ 60
RE- 61
RE+ 62
PGND 63
PVCC 64
RA- 49
RA+
50
RB-
51
RB+
52
RC-
54
RC+
55
RD- 59
RD+
60
RE-
61
RE+
62
RCLK-
56
PLL
RCLK+
57
R/F 5
DK 2
PD 3
OE 4
PDP-5000EX
6
7
32 RB6
31 CLKOUT
30 GND
29 RC0
28 RC1
27 RC2
26 RC3
25 RC4
24 RC5
23 VCC
22 RC6
21 RD0
20 RD1
19 RD2
18 RD3
17 RD4
CMOS/TTL OUTPUT
7
40-43,
RA6-RA0
45-47
7
32-36,
RB6-RB0
38,39
7
22,
RC6-RC0
24-29
7
14,15,
RD6-RD0
17-21
7
6-8,
RE6-RE0
10-13
31 CLKOUT
7
8
A
B
C
D
E
F
179
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