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204
Instruction
C
Z
?!
V
S
N
H
Comments
ADD A.
s;
ADC
A,
s
•
4
X
V
f
4
0
X
8-bit add or add
with
carry
SUB
s;
SBC
A.
s:
CP s; NEC
:
X
V
X
1
X
8-bit
subtract,
subtract with carry, compare and
negate
accumulator
ANDs
0
X
p
:
a.
1
\
Logical
operations
OR
s;
XOR s
0
X
p
t
0
0
*
J
And set's different flags
INCs
• :•
V
:
0
♦
♦
8-bit
increment
DF.Cm
•
t
V
t
4
i
1
8-bit decrement
ADD
DD. ss
♦
*
• •
•
0
X
16-bit add
ADC
HL.
ss
:
:
V
I
0
X
16-bit add with carry
SBC
HL.
ss
x
*
V
:
I
X
16-bit subtract with
carry
RLA; RLCA; RRA;
RRCA;
x •
• •
0
0
Rotate accumulator
RL
m.
RLC
m;
RR m. RRC m
SLA
m;
SRA
m;
SRL
m
X
:
p
t
0
0
Rotate and shift location s
RLD;
RRD
• x
p
A
0
0
Rotate
digit
left and
right
DAA
t
X
p
A
•
:
Decimal
adjust accumulator
CPL
• •
•
•
1
i
Complement accumulator
SCF
l
• •
•
0
0
Set carry
CCF
f
•
•
•
0
X
Complement carry
IN
r.
(O
•
i
p
4
0
0
Input
register
indirect
INI:
IND; OUT1;
OUTD
•
X
X
X
l
X
\
Block
input
and
output
INIR;
INDR: OTIR:
OTDR
•
1
X
X
l
X
J
Z
s
0 if B
i
0
otherwise
Z
=
1
LDI;
LDD
•
X
x
\
0
0
) Block transfer instructions
LDIR;
LDDR
•
X
0
X
0
0
|
P/V
-
l if BC
t
0.
otherwise
P/V
=
0
CPI;CPIR; CPD; CPDR
•
♦
i
4
X
1
X
Block
search instructions
Z
-
1 if A
=
(HL).
otherwise
Z
=
0
P/V
=
l if BC
?
0.
otherwise
P/V
=
0
LD A.
I;
LD A.
R
•
1
IFF
1
0
0
The
content
of the interrupt
enable flip-flop
(IFF)
is copied
into
the
P/V
flag
BIT
b,
s
•
X
X
X
0
1
The
state
of bit b of location
s
is
copied
into
the Z flag
NEC,
The
following
notation
u
:
use
X
d
in
v x
this tabl
I
e:
:
Negative accumulator
Symbol
Operation
C
Carry
/link
Hag. C
=
1 if
the operation produced
a
carry
from the MSB of the operand or result.
Z
Zero
Hag.
Z
=
1
if the result
of the
operation
is
zero.
S
Sign flag S
=
l if the
MSB
of the result is one.
P/V
Parity or overflow flag. Parity
(P)
and overflow
(V)
share the
same
flag. Logical
operations
affect this flag with the
parity
of the result while arithmetic
operations affect this flag w ith the overflow
of
the result. If
P/V
holds parity,
P/V'
*
1 if
the
result of the
operation
is
even.
P/V
=
0 if result is
odd.
If
P/V'
holds
overflow,
P/V
=
1
if the result of the
operation
produced
an overflow.
H
Half-carry flag.
H
=
1 if the add or subtract
operation produced
a
carry
into
or
borrow from into bit 4 of the accumulator.
N
Add/Subtract
flag, N
=
l if the previous operation was a subtract.
H and N
flags
are
used in
conjunction
with the decimal
adjust
instruction
(DAA) to
properly
correct
the result into packed
BCD format following
addition
or
subtraction
using operands
with packed
BCD format.
1
The flag is affected
according to
the result of the operation.
•
The flag
is
unchanged
by
the operation.
0
The
flag
is
reset by
the
operation.
1
The flag is
set by
the
operation.
X
The flag is
a "don't care."
V
P/V
flag affected according
to
the overflow result of the
operation.
P
P/V
flag affected according
to the
parity
result of the operation.
r
Any
one of the CPC
registers
A,
B.
C, D, E, H,
L.
s
Any
8-bit location for all the
addressing modes
allowed for
the particular instruction.
ss
Any
16-bit location for all the
addressing modes
allowed for that
instruction.
ii
Any
one of
the
Iw'o
index registers
IX or IY.
R
Refresh
counter.
n
8-bit value
in range
<0. 255
>
nn
1 6-bit value in range
<0. 65535>
m
Any
8-bit location for all
the addressing modes
allowed for the
particular
instruction.
SUMMARY OF FLAG OPERATION
TABLE 3.4-1
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