Table of Contents
Advertisement
187
An
example of
an
indexed instruction would be
to
load the
contents
of the memory location
(Index Register + Dis¬
placement) into the accumulator. The displacement is
a
signed
two's complement number.
Indexed addressing greatly
simplifies programs
using
tables of data since the index
register
can point
to the start
of any table. Two index
registers
are
provided
since
very often
operations require two
or more
tables. Indexed addressing also allows for relocatable
code.
The
two
index
registers in the
Z-SO are referred
to
as IX
and IY.
To indicate
indexed addressing the notation:
(IX
+
d)
or
(
I Y
+
d)
is
used. Here d is the displacement specified after the OP code. The parentheses indicate that this value is used as
a
pointer
to
external memory.
Register Addressing. Many of the
Z-80 OP codes
contain bits
of information that specify which
CPU
register is
to
be
used for an operation. An example of
register
addressing would
be
to
load the data in register
B
into
register
C.
Implied Addressing.
Implied addressing refers
to
operations where the OP code automatically implies one or more
CPU
registers as containing
the operands.
An example is
the
set
of arithmetic operations where the accumulator
is
always
implied
to be
the destination of the results.
Register
Indirect Addressing. This type of addressing specifies a 16-bit
CPU
register pair
(such
as HL)
to
be used
as
a
pointer to any location
in
memory. This
type
of instruction
is very
powerful and
it is
used
in a wide range
of applica¬
tions.
OPCode
one or
two bytes
An example
of this
type
of instruction would be
to
load the accumulator
with the data in the memory location
pointed
to
by the
HL
register contents. Indexed addressing is actually
a form of
register indirect
addressing except that
a displacement
is
added with indexed addressing.
Register indirect
addressing allows for very
powerful
but simple
to
implement memory
accesses.
The block move and search commands
in
the Z-SO are extensions of this type of address¬
ing
where
automatic
register
incrementing,
decrementing and comparing has been added. The
notation
for indicating
register indirect addressing is to
put
parentheses around the
name
of the register that is
to
be used
as
the pointer.
For
example, the symbol
(HL)
specifics that the
contents
of the
HL
register are
to
be
used as a pointer
to
a
memory location. Often
register
indirect
addressing is used
to
specify
16-bit operands. In this
case,
the register
contents point
to
the lower order portion of the
operand while the
register contents
are automatically incremented
to
obtain the upper portion of the operand.
Bit Addressing. The Z-SO contains
a
large number of bit
set,
reset
and
test instructions.
These
instructions
allow
any
memory location or CPU
register to
be
specified for
a
bit operation through
one
of three previous addressing modes
t
register, register indirect
and
indexed)
while three bits
in
the
OP code specify which of
the
eight bits
is to
be manipul¬
ated.
ADDRESSING MODE COMBINATIONS
Many instructions include more than one operand (such as arithmetic
instructions or loads).
In these
cases, two
types
of
addressing may be employed. For example, load
can use
immediate addressing to specify the
source and
register indirect or indexed addressing
to
specify
the
destination,
Advertisement
Table of Contents
