Icom IC-2100H Service Manual page 7

3-1-7
SQUELCH
CIRCUIT (MAIN and LOGIC
units)
•
NOISE
SQUELCH
The
noise squelch
circuit
cuts out
AF
signals
when no
RF
sig-
nals are
received.
By
detecting noise
components
in
the
AF
signals, the squelch
circuit
switches the
AF
mute
switch.
A
portion
of
the
AF
signals
from the
FM
IF
1C
(IC6, pin 9) are
applied
to
the
active
filter
section
(IC6, pin
8).
The
active
fil-
ter section amplifies
and
filters
noise components.
The
fil-
tered signals
are applied
to
the noise detector section and
output from
pin
14 as
the "SQL"
signal.
The
"SQL"
signal
from IC6
(pin14)
is
applied
to the
CPU
(LOGIC
unit;
IC1, pin 98).
The
CPU
analyzes the noise con-
dition
and
outputs the
"RMUT'
and
"AMUT'
signals via the
I/O
expander
1C
(LOGIC
unit;
IC10)
to toggle the detector
(Q25)
and
AF
(Q28)
mute
switches.
Even
when
the squelch
is
closed, the
AF
mute
switch
(Q28)
opens
at
the
moment
of emitting
beep
tones.
•TONE SQUELCH
The
tone squelch
circuit
detects
AF
signals
and opens
the
squelch
only
when
receiving
a
signal containing a matching
subaudible tone (CTCSS).
When
tone squelch
is in
use,
and
a
signal with
a mismatched
or
no subaudible tone
is
received, the
tone squelch
circuit
mutes
the
AF
signals
even
when
noise squelch
is
open.
A
portion of
the
AF
signals from the
FM
IF 1C (IC6, pin 9)
passes
through
the
low-pass
filter
(LOGIC
unit;
IC6)
to
remove
AF
(voice) signals
and
is
applied
to
the
CTCSS
decoder
inside the
CPU
(LOGIC
unit;
IC1, pin
1)
via
the
'TONE
IN" line to control the
DET
and
AF
mute
switches.
3-2
TRANSMITTER
CIRCUIT
3-2-1
MICROPHONE
AMPLIFIED (LOGIC
unit)
The
microphone
amplifier
circuit
amplifies
audio
signals with
+6
dB/octave pre-emphasis
characteristics
from
the micro-
phone
to
a
level
needed
for
the modulation
circuit.
The AF
signals
from
the
microphone
are adjusted
for
imped-
ance-matching
at
the
MIC
sensitivity control
circuit (IC4,
D4).
The
adjusted signals pass through
the
MIC
mute
switch (Q4),
and
are then
amplified at the
microphone
amplifier
(Q5)
and
the
limiter amplifier (IC5a)
which has a
negative feedback
circuit for
+6
dB/octave pre-emphasis.
The
amplified signals are applied
to the
low-pass
filter
(IC5b)
to
filter
out
RF
components and
are then applied
to
the
MAIN
unit
as
the
"MOD"
signal.
3-2-2
MODULATION
CIRCUIT (MAIN
unit)
The
modulation
circuit
modulates
the
VCO
oscillating signal
(RF
signal)
using the microphone audio
signals.
The
audio
signals
(MOD)
change
the reactance
of
D1
to
modulate
the oscillated signal at the
TX-VCO
circuit (Q1,
Q2).
The
modulated
signal
is
amplified
at
the buffer amplifier
(Q4)
and
LO
amplifier (Q6), then applied
to
the
drive ampli-
fiers.
3-2-3
DRIVE AMPLIFIER CIRCUIT (MAIN
unit)
The
drive amplifier
circuit amplifies the
VGO
oscillating signal
to the
level
needed
at the
power
amplifier.
The RF
signal
from
the
LO
amplifier
(Q5)
passes through
the
T/R
switch (D5) and
is
amplified
at
the
pre-drive
(Q13)
and
drive
(Q14) amplifiers.
The
amplified signal
is
applied
to the
power
amplifier
circuit.
3-2-4
POWER
AMPLIFIER CIRCUIT
(MAIN
unit)
The power
amplifier
circuit
amplifies the driver signal to
an
output power
level.
The
RF
signal
from
the drive amplifier
(Q14)
is
applied
to the
power module
(1C4)
to
obtain 55
W
(25
W
for
Taiwan
version,
1
0
W
for the IC-21
00-T
Thailand
version)
of
RF
power.
The
amplified signals
is
passed
through
the
antenna
switch-
ing
circuit (D7),
ARC
detector
circuit
(LI
8,
D8, D9),
and
low-
pass
filter
(LI
9,
L20,
C62-C64)
and
is
then applied
to
the
antenna
connector.
Collector voltages
for
the
driver
(Q13)
and
control voltage
for
the power
amplifier (IC4, pin 2) are
controlled by the
ARC
cir-
cuit to protect
the power module
from a mismatched
condi-
tion
as
well
as
to stabilize the output power.
3-2-5
APC
CIRCUIT (MAIN
unit)
The
ARC
circuit protects the
power
amplifier from a
mis-
matched
output load
and
stabilizes the output power.
The
ARC
detector
circuit
(L10, D8, D9)
detects forward
sig-
nals and
reflection signals at
D8
and
D9
respectively.
The
combined
voltage
is
at
minimum
level
when
the antenna
impedance
is
matched
at
50
Q
and
is
increased
when
it
is
mismatched.
The
detected voltage
is
applied
to
the
differential amplifier
(IC3, pin
3),
and
the
power
setting voltage
is
applied
to the
other input
(pin 1) for the reference.
When
antenna impedance
is
mismatched,
the
detected
volt-
age exceeds
the
power
setting voltage.
The
output voltage
of
the
differential amplifier (IC3, pin 4) controls
the input current
of the
power module
(IC4)
and
drive amplifier
(Q14) to
reduce
the output
power
via
the
ARC
controller (Q18, Q19).
•
APC
circuit
3-2
for free
by
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