Receiver Back-End; Frequency Generation Unit (Fgu); Pll Synthesizer; Figure 14-3 Diagram Of If Processor - Hytera MD78X Service Manual

VHF (136-174MHz 25W) Information
14.2.2

Receiver Back-end

The first IF signal (44.85MHz) output by the IF amplifier goes into IF IC via Pin 47, where the signal is
converted to the second IF signal (2.25MHz). Then the un-demodulated digital I/Q signal output from
the SSI interface is sent to U302 for demodulation. IF IC employs a reference frequency of 19.2MHz
and shares the crystal with U302. The second LO VCO consists of the external transistor, varactor and
some other components, to provide the second LO signal. The 18MHz clock frequency is generated by
the LC resonance loop (D702, L715 and C745).
DSP (U302) gets the audio signal from IF IC (U701). Then this signal goes through U302 to output
data signal, which is sent to U231 and PIN44 (SSI_DI) for digital-to-analog conversion. Finally, the
output analog audio signal will be subjected to gain control, and then fed to the speaker.
14.3

Frequency Generation Unit (FGU)

14.3.1

PLL Synthesizer

The PLL synthesizer that consists of the reference oscillator (X100), PLL IC (U100) and VCO, is
utilized to supply excitation signal source to the transmitter, and local oscillator signal to the receiver.

Figure 14-3 Diagram of IF Processor

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