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Theory of Operation
Controller Detailed Functional Description
mode it uses only its internal memory. In normal radio
operation, the K1µP is operating in the expanded
mode.
In the radio expanded mode, the K1µP (U101) has
access to three external memory ICs: U102 (Flash mem-
ory), U103 (SRAM), U104 (EEPROM). Also, within the
K1µP there are 768 bytes of internal RAM and 640 bytes
of internal EEPROM, as well as glue logic circuitry to
select external memory ICs.
The external EEPROM (U104) as well as the K1µP's
own internal EEPROM contain the radio information
which is customer specific, referred to as the codeplug.
This information consists of items such as: 1) frequency
operating band, 2) channel frequencies, and 3) general
tuning information. General tuning information and
other more frequently accessed items are stored in the
internal EEPROM (within the 68HC11K1), while the
remaining data is stored in the external EEPROM. (See
the particular IC subsection for more details.)
The external SRAM (U103) as well as the K1µP's own
internal RAM are used for temporary calculations
required by the software during normal radio opera-
tion. All of the data stored in both of these locations is
lost when the radio is powered off. (See the particular
IC subsection for more details.)
The Flash memory contains the actual Radio Operating
Software. This software is common to all radios for the
same model type. For example, Privacy Plus models
have a different version of software in Flash memory
than an LTR model. (See the particular IC subsection
for more details.)
The K1µP has an address bus of 16 address lines (A0-
A15), a data bus of 8 data lines (D0-D7). and three con-
trol lines; CSPROG (U101-29) to select U102-30 (OTP
memory), CSGP2 (U101-28) to select U103-20 (SRAM)
and PG7_R_W for read and write. All other chips
( A S F I C / P E N D U L -
LUM/DAC/FRACN/LCD/LED/EEPROM) are
selected by 3 lines of the K1µP using chip select
decoder U105. When the K1µP is functioning normally,
the address and data lines should be within CMOS
logic levels.
The low-order address lines (A0-A7) and the data lines
(D0-D7) should change.
On the K1µP the lines XIRQ (U101-30), MODA LIR
(U101-77), MODB VSTPY (U101-76) and RESET (U101-
75) should be logic high during all normal K1µP oper-
ation. Whenever a data or an address line becomes
unloaded or shorted to an adjacent line, a common
symptom is that short negative pulses occur on the
RESET line, with a period of 20 msec. When two lines
are short-circuited, mid logic level (around 2.5 V) may
be observed, while these lines are opposite driven by
two different ICs.
8-8
GTX LTR/Privacy Plus 800 MHz Mobile Service Manual
The MODA LIR (U101-77) and MODB VSTPY
(U101-76) inputs to the K1µP must be at a logic 1 level
for proper operation. After the K1µP starts execution, it
will periodically pulse these lines to determine the
desired operating mode. While the Central Processing
Unit (CPU) is running a new instruction, MODA LIR
(as an open-drain CMOS output) drops low.
However, since it is an open-drain output, the signal
waveform rise has an exponential shape, like an RC cir-
cuit.
The µP has eight analog-to-digital converter ports
(A/D): PE0 to PE7. These lines may measure voltage
levels in the range of 0 to 5 VDC and convert that level
to a number ranging from 0 to 255 which can be read
by the software to take appropriate action.
For example, U101-46 is the battery voltage detect line.
R641 and R642 form a resistor divider on SW_B+. With
47.5K and 16.2 K and a voltage range of 11 V to 17 V, the
A/D port would see 2.74 V to 4.24 V which would then
be converted to a digital value in the range of 140 to 217
respectively.
U101-51 is the high reference voltage for the A/D ports
on the K1µP. Resistor R106 and capacitor C106 filter the
+5 VDC reference. If this voltage is lower than +5 VDC
the A/D readings will be incorrect. Likewise U101-50
is the low reference for the A/D ports. This line is nor-
mally tied to ground. If this line is not connected to
ground, the A/D readings will be incorrect.
Capacitors C104, C105 serve to filter out any AC noise
which may ride on +5VDC at U101.
One-Time Programmable (Flash) Memory
The 32-KByte Flash memory (U102) contains the
radio's operating software. This memory is read-only.
The memory access signals (EN_CE, EN_OE and
EN_WE) are generated by the µP.
Capacitor C131 serves to filter out any AC noise which
may ride on +5V at U101, and C132 filters out any AC
noise on Vpp.
Electrically Erasable Programmable
Memory (EEPROM)
EEPROM (U104) contains the radio's operating param-
eters such as operating frequency and signalling fea-
tures, commonly known as the codeplug. It is also used
to store radio operating state parameters such as cur-
rent mode and volume. U104 is a 8 Kbyte device. This
memory can be written to in excess of 100,000 times
and will retain the data when power is removed from
the radio. The memory access signals (SI, SO and SCK)
are generated by the K1µP and chip select (CS_) is gen-
erated by address decoder U105.
6880905Z99-O
June, 2000
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Troubleshooting
