Panasonic SA-AK110P Service Manual page 42

SA-AK110P /
Pin No. Mark I/O
56 SBCK I
57 VSS i
58 X1 IN I
59 X2 OUT O
60 VDD I
61 BYTCK -
62 /CLDCK -
63 FCLK -
64 IPFLAG -
65 FLAG -
66 CLVS -
67 CRC -
68 DEMPH -
69 RESY -
70 IOSEL I
71 /TEST I
72 AVDD1 I
73 OUTL I
74 AVSS1 I
75 OUTR O
76 RSEL I
77 IOVOD I
78 PSEL I
79 MSEL I
80 SSEL I
14.3. IC703 (AN8739SBTE2) Focus
coil/ Tracking coil/ Traverse
motor/ Spindle motor driver
Pin No. Mark I/O
1 /RST -
2 NC -
3 IN2 I
4 PC2 I
5 NC -
6 IN1 I
7 NC I
8 PVCC1 I
9 PGND1 -
10 NC -
11 D1- O
12 D1+ O
13 D2- O
14 D2+ O
Function
Clock input for sub-code serial
data
GND
Crystal oscullating circuit input (f =
16.9344MHz)
Crystal oscillating circuit input ( f =
16.9344MHz)
Power supply input ( for oscillating
circuit)
Byte clock output
Sub-code frame clock signal output
(fCLDCK = 7.35 kHz during normal
playback)
Crystal frame clocksignal output
(fCLK = 7.35 kHz, double = 14.7
kHz)
Interpolation flag output ("H" :
Interpolation)
Flag output
Spindle servo phase synchronizing
signal output ("H" : CLV, "L" :
rough servo)
Sub-code CRC checked output
("H" :OK, "L":NG)
De-emphassis ON signal output
("H" :ON)
Frame re-synchronizing signal
output
Mode Switching Terminal
Test input
Power supply input (for analog
circuit)
Left channel audio signal output
GND
Right channel audio signal output
RF signal polarity assignment input
(at "H" level, RSEL="H", at "L"
level, RESL = "L")
5V supply input
Test terminal (connected to Gnd)
SMCK osillating frequency
designation input ("L":4.2336 MHz,
"H":8.4672 MHz)
SUBQ output mode select ("H":Q-
code buffer mode)
Function
RESET output terminal
N.C.
Motor drive (2) input
Turntable motor drive signal ("L"
:ON)
N.C.
Motor driver (1) input
N.C.
Power supoply (1) for driver
Ground connection (1) for driver
N.C.
Motor driver (1) reverse-action
output
Motor driver (1) forward-action
output
Motor driver (2) reserse-action
output
Motor driver (2) forward-action
output
Pin No. Mark I/O
15 D3- O Motor driver (3) reverse-action
output
16 D3+ O Crystal oscillating circuit input (f =
16.9344MHz)
17 D4- O Motor driver (4) reverse-action
output
18 D4+ O Motor driver (4) forward-action
output
19 NC - N.C.
20 PGND2 - Ground connection (2) for driver
21 PVCC2 I Power supply (2) for driver
22 NC - N.C.
23 VCC I Power supply terminal
24 VREF I Reference voltage input
25 IN4 I Motor driver (4) input
26 IN3 I Motor driver (3) input
27 RSTIN I Reset terminal
28 NC - N.C.
29-30 GND - Ground
14.4. IC600 (C2BBGF000404)
System Microprocessor
Pin No. Mark I/O
1 DECK2 I
2 KEY1 I
3 KEY2 I
4 VJOG_A I
5 VJOG_B I
6 CHG_AD2 I
7 CHG_AD1 I
8 DECK 1 I
9 STATUS I
10 LVL MTR I
L/RDS_DAT
11 LVL MTR I
R/SPE_IN
12 ST/DO/SQC I
K
13 SD I
14 SUBQ I
15 RDS_CLK I
16 PCONT O
17 CNVss -
18 /RESET -
19 XCOUT -
20 XCIN -
21 VSS -
22 XIN -
23 XOUT -
24 VCC -
25 MBP1 O
26 MBP2 O
27 MCLK/PLLC O
K
28 MDATA/PLL O
DA
29 RMT I
30 BLKCK I
31 MLD/PLLCE O
32 SYNC I
33 DCDET I
34 CHG_CCW O
42
Function
Function
(RECI_F/MODE2/RECI_R/HALF2)
Key 1 input
Key 2 input
Volume jog A-D detection
Volume jog A-D detection
(Position/bottom) chngr sw A-D
detection input 1
(Position/bottom) chngr sw A-D
detection input 2
Tape mecha condition input.
(Half2/Reci_F/Mode/Reci_R)
CD signal processor status input
(INV)
Level meter left/RDS data input
Level meter right/?
Tuner IF Data/Stereo Input and
CD Sub Code Clock Output
Tuner Signal Detch Input
CD subcode data input (INV)
RDS clock input
Main transformer control output
Flash Mode Terminal (Connect To
Ground)
RESET Input
32.768 kHz Sub Clock
32.768 kHz Sub clock
Ground (0V)
4.19 MHz Main Clock
4.19MHz Main Clock
Power Supply (+15)
MPU Beat Proof Output 1
MPU Beat Proof Output 2
CD command clock output/Tuner
PLL clock output
CD command data output/Tuner
PLL data output
Remote Control Input
CD block clock input (INV)
CD command load output/Tuner
PLL chip enable
AC Failure Detch Input
DC Detech Input
Changer motor CCW output