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WinSystems EBC-C384-D Manual

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EBC-C384-D
Intel
ATOM
®
TM
PRODUCT MANUAL
EBX Single Board Computer
WinSystems, Inc.
715 Stadium Drive
Arlington, TX 76011
http://www.winsystems.com
WinSystems
®

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Summary of Contents for WinSystems EBC-C384-D

  • Page 1 WinSystems ® EBC-C384-D Intel ATOM EBX Single Board Computer ® PRODUCT MANUAL WinSystems, Inc. 715 Stadium Drive Arlington, TX 76011 http://www.winsystems.com...
  • Page 2 MANUAL REVISION HISTORY P/N 400-384-000 Revision Date Code ECO Number 111219 Initial Release 120125 120507 120606 130405 130509 130723 140206 ECO 14-07 140703 140703...

  • Page 3: Table Of Contents

    TABLE OF CONTENTS BEFORE YOU BEGIN Visual Index - Top View (Connectors) Visual Index - Top View (Jumpers & LEDs) Visual Index - Bottom View Jumper Reference INTRODUCTION FEATURES System Memory FUNCTIONALITY I/O Port Map Interrupt Map PCI Devices and Functions DOS Legacy Memory Map Watchdog Timer Real-Time Clock/Calendar...
  • Page 4 SERIAL ATA J23, J25 - SATA COMPACTFLASH J28 - CompactFlash PARALLEL ATA J11 - PATA ETHERNET J13, J8 - Gigabit Ethernet DIGITAL I/O J9, J12 - Digital I/O JP5/JP8 - Digital I/O Power Register Definitions (WS16C48) Register Details PC/104 BUS J15, J17 - PC/104 PC/104-Plus BUS J18 - PC/104-Plus...
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  • Page 6: Before You Begin

    This product ships with a heat sink. Product warranty is void if the heat sink is removed from the product. For any questions you may have on WinSystems products, contact our Technical Support Group at (817) 274-7553, Monday through Friday, between 8 AM and 5 PM Central Standard Time (CST).

  • Page 7: Visual Index - Top View (Connectors)

    Visual Index - Top View (Connectors) Serial I/O Power and Reset ATX Signals PBRESET PS/2 Mouse COM3/4) (4/5/6/7) (0/1/2/3) Multi-I/O Ethernet2 (COM1/2, Keybd, (82567V) LPT) Ethernet1 Digital I/O (82583V) (Ports 0/1/2) Digital I/O PATA (Ports 3/4/5) PC/104-Plus External Battery PC/104 (C/D) Audio PC/104 (A/B) Analog VGA...

  • Page 8: Visual Index - Top View (Jumpers & Leds)

    Visual Index - Top View (Jumpers & LEDs) COM3 Termination Digital I/O Power (J12) COM4 Termination Digital I/O Power (J9) CompactFlash (Master/Slave) Status LED IDE/SATA Activity LED JP16 EEPROM Enable JP10 COM2 Termination JP15 EEPROM Enable JP11 COM1 Termination JP13 LVDS Power RESERVED - JP1, JP2, JP3, JP4, JP12, JP14, JP17 NOTE: The reference line to each component part has been drawn to Pin 1, and is also highlighted with a square, where applicable.

  • Page 9: Visual Index - Bottom View

    Visual Index - Bottom View MiniPCI CompactFlash J203 Memory1 J204 Memory2 RESERVED - JP1, JP2, JP3, JP4, JP12, JP14, JP17 NOTE: The reference line to each component part has been drawn to Pin 1, and is also highlighted with a square, where applicable. 140703...

  • Page 10: Jumper Reference

    Jumper Reference NOTE: Jumper Part# SAMTEC 2SN-BK-G is applicable to all jumpers. These are available in a five piece kit from WinSystems (Part# KIT-JMP-G-200). JP9 - CompactFlash CompactFlash Master (default) □ □ CompactFlash Slave JP11 - COM1, JP10 - COM2, JP7 - COM3, JP6 - COM4...
  • Page 11 Jumper Reference (cont’d) JP13 - Panel Power Avoid Simultaneous Jumpering of pins 1-2 and 2-3. JP13 Misjumpering panel power causes damage to the □ board and/or the Flat Panel. □ □ Panel Power 3.3V (default) JP5 - Digital I/O VCC for J9 +5V is provided at pin 49 of J9 □...
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  • Page 13: Introduction

    This manual is intended to provide the necessary information regarding configuration and usage of the EBC-C384 single board computer. WinSystems maintains a Technical Support Group to help answer questions not adequately addressed in this manual. Contact Technical Support at (817) 274-7553, Monday through Friday, between 8 AM and 5 PM Central Standard Time (CST).

  • Page 14: System

    Power • +5V required, 2.9A typical Industrial Operating Temperature • -40°C to 75°C Mechanical • EBX-compliant • Dimensions: 5.75” x 8.00” (147 mm x 203 mm) • Weight: 16 oz (453.59 g) (with heatsink) Additional Features • RoHS compliant • Backlight power supported •...

  • Page 15: Functionality

    FUNCTIONALITY I/O Port Map Following is a list of I/O ports used on the EBC-C384. NOTE: The EBC-C384 uses a PnP BIOS resource allocation. Care must be taken to avoid contention with resources allocated by the BIOS. HEX Range Usage 0000h-001Fh DMA Controller 82C37 0020h-0021h...
  • Page 16 HEX Range Usage 0340h-03E7h Reserved * 0376h IDE1 Controller 0378h-037Bh LPT (Default) 03E8h-03EFh COM3 (Default) 03F0h-03F5h Reserved 03F6h IDE0 Controller 03F8h-03FFh COM1 (Default) 04D0h-4D1h Interrupt Controller 0564h-0568h Advanced Watchdog 0CF9h Reset Generator This product utilizes a LPC to ISA Bridge to address the PC/104 bus. The majority of legacy PC/104 modules are I/O mapped and function as expected.

  • Page 17: Interrupt Map

    COM1 Note: A 1 will be read for the device(s) with an interrupt pending. WinSystems does not provide software support for implementing the Interrupt Status Register to share interrupts. Some operating systems, such as Windows XP and Linux, have support for sharing serial port interrupts and examples are available. The user will need to implement the appropriate software to share interrupts for the other devices.

  • Page 18: Pci Devices And Functions

    PCI Devices and Functions Bus:Device:Function Function Description Bus 0:Device 0:Fun: 0 Processor Host Bridge/DMI Controller Bus 0:Device 2:Fun: 0 Processor Host Bridge/Graphics Controller Bus 0:Device 2:Fun: 0 Processor Host Bridge/Graphics Controller Bus 0:Device 25:Fun: 0 Internal GbE Controller Bus 0:Device 26:Fun: 1 USB UHCI Controller Bus 0:Device 26:Fun: 7 USB UHCI Controller...
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  • Page 20: Watchdog Timer

    The EBC-C384 features an advanced watchdog timer which can be used to guard against software lockups. Two interfaces are provided to the watchdog timer. The Advanced interface is the most flexible and recommended for new designs. The other interface option is provided for software compatibility with older WinSystems single board computers. Advanced The watchdog timer can be enabled in the BIOS Settings by entering a value for Watchdog Timeout on the Intel →...

  • Page 21: Real-Time Clock/Calendar

    Real-Time Clock/Calendar A real-time clock is used as the AT-compatible clock/calendar. It supports a number of features including periodic and alarm interrupt capabilities. In addition to the time and date keeping functions, the system configuration is kept in CMOS RAM contained within the clock section. A battery must be enabled for the real-time clock to retain time and date during a power down.

  • Page 22: Connector Reference

    □ □ □ □ □ □ □ □ □ 1 2 3 4 5 6 7 8 9 CBL-236-G-2-1.5 Power is applied to the EBC-C384 via the connector at J6. WinSystems offers the cable CBL-236-G-2-1.5 to simplify this connection. Visual...

  • Page 23: J3 - Atx Signals

    □ PWR_BTN □ ATX signals for the power button, reset and power good are provided at J3. WinSystems offers the cable CBL-PWR-600-14 to simplify this connection. The EBC-C384 supports either AT (standard power supply) or ATX type power supplies. Zero load supplies are recommended.

  • Page 24: Battery Backup

    CMOS setup RAM and SRAM (applicable models only). An extended temperature lithium battery is available from WinSystems, part number BAT-LTC-E-36-16-1 or BAT-LTC-E-36-27-1. A power supervisory circuit contains the voltage sensing circuit and an internal power switch to route the battery or standby voltage to the circuits selected for backup.

  • Page 25: Video

    VIDEO Visual J19 - ANALOG VGA Index PCB Connector: MOLEX 87832-1420 (J19) Mating Connector: MOLEX 51110-1451 (Housing) MOLEX 50394-8051 (Crimp) □ □ □ □ GREEN □ □ BLUE □ □ HSYNC □ □ VSYNC □ □ DDCDATA □ □ DDCCLK CBL-234-G-1-1.375 140703...

  • Page 26: J20 - Lvds

    Visual J20 - LVDS Index PCB Connector: MOLEX 501571-4007 (J20) Mating Connector: MOLEX 501189-4010 (Housing) MOLEX 501193-2000 (Crimp) □ □ SWVDD □ □ □ □ □ □ SWVDD □ □ □ □ □ □ SWVDD □ □ CLK- CLK+ □ □...

  • Page 27: Jp13 - Panel Power

    The LVDS interface connector is located at J20 to interface to flat panels. A backlight power connectors is located at J24. Panel power option selection is made at JP13. Contact your WinSystems’ Applications Engineer for information about available cable kits and supported panels. This manual does not attempt to provide any information about how to connect to specific LCDs.

  • Page 28: Audio

    Audio External Connection The Intel HD Audio controller is included with a Realtek ALC662 codec. Audio connection is provided at J16. Three cables are available from WinSystems to adapt to this connector. CBL-AUDIO7-102-12 provides full 7.1 audio support. A simplified cable, CBL-AUDIO2-102-12, provides basic Line In, Line...

  • Page 29: Sp1 - Speaker

    CBL-AUDIO2-102-12 CBL-AUDIO5-102-12 SP1 - Speaker Speaker An on-board speaker, SP1, is available for sound generation. Beep Codes Reference the chart Appendix-B section of this manual for the appropriate beep codes. 140703...

  • Page 30: Multi-I/O

    The interface to I/O serial ports (COM1/COM2), the printer port and keyboard are all terminated via the connector at J7. A cable, part number CBL-247-G-1-1.0, is available from WinSystems to adapt to the conventional I/O connectors. The pinout definition for J7 is listed below.
  • Page 31 COM1, COM2 [DB9 Male] RS-232 RS-422 RS-485 TX/RX+ TX/RX- All serial ports are configured as Data Terminal Equipment (DTE). Both the send and receive registers of each port have a 16-byte FIFO. All serial ports have 16C550-compatible UARTs. The RS-232 transceivers have charge pumps to generate the plus and minus voltages so the EBC-Z5xx only requires +5V to operate.
  • Page 32 LPT [DB25 Female] SPP Signal STROBE PD0-PD7 BUSY SLCT AUTOFD ERROR INIT SLCTIN 18-25 The LPT port is a multimode parallel printer port that supports the PS/2 Standard Bidirectional Parallel Port (SPP) and Enhanced Parallel Port (EPP) functionality. The output drivers support 8 mA per line. The printer port can also be used as two additional general-purpose I/O ports if a printer is not required.

  • Page 33: Mouse

    MOUSE Visual J1 - Mouse Index PCB Connector: MOLEX 22-12-2054 (J1) Mating Connector: MOLEX 22-01-2057 (Housing) MOLEX 08-55-0102 (Crimp) □ □ □ □ □ 5 4 3 2 CBL-343-G-1-1.375 PS/2 Mouse [6-Position] 140703...

  • Page 34: Serial

    SERIAL Visual J10 - COM3, COM4 Index PCB Connector: TEKA SVC210C405M123-0 (J10) Mating Connector: ITWPANCON 050-020-455A 2 4 6 8 10 12 14 16 18 20 □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ 1 3 5 7 9 11 13 15 17 19 COM3...
  • Page 35 COM3 and COM4 Configuration Options in BIOS 1. RS-232 Mode 2. RS-422 Mode with RTS transmitter enable 3. RS-422 Mode with auto transmitter enable 4. RS-485 Mode with RTS transmitter enable 5. RS-485 Mode with RTS transmitter enable and echo back 6.

  • Page 36: Usb J4, J5 - Usb

    Up to two USB cables may be attached to the EBC-C384 via the connectors for a total of eight USB 2.0 ports. These are terminated to 20-pin connector at J4 and J5. An adapter cable CBL-USB4-002-12 is available from WinSystems for connection along with ADP-IO-USB-001. 140703...

  • Page 37: Serial Ata

    CompactFlash storage devices for applications where the environment is too harsh for mechanical hard disks. The CompactFlash socket at J28 supports modules with TrueIDE support. WinSystems offers industrial grade CompactFlash modules that provide high performance and extended temperature operation (-40ºC to +85ºC).

  • Page 38: Parallel Ata J11 - Pata

    PARALLEL ATA Visual J11 - PATA Index PCB Connector: SAMTEC STMM-122-02-G-D-SM-P-TR (J11) Mating Connector: SAMTEC ASP-129789-01 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1 □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □...

  • Page 39: Ethernet

    ETHERNET Visual J13, J8 - Gigabit Ethernet Index Gigabit Ethernet Controllers The EBC-C384 is equipped with two Intel Gigabit Ethernet controllers, one using the 82583 controller and the other using the 82567 controller. Each of these provides a standard IEEE 802.3 Ethernet interface for 1000/100/10BASE-T networks. The RJ-45 connections for each Ethernet port are available at J13 (Port 1) and J8 (Port 2).

  • Page 40: Digital I/O

    DIGITAL I/O J9, J12 - Digital I/O Visual Index PCB Connector: TEKA SVC225C405M123-0 (J9, J12) Mating Connector: ITW-PANCON 050-050-455A (Housing) 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 □...

  • Page 41: Register Definitions (Ws16C48)

    Register Definitions (WS16C48) The EBC-C384 uses the WinSystems exclusive ASIC device, the WS16C48. This device provides 48 lines of digital I/O. There are 16 unique registers within the WS16C48. The following table summarizes the registers, and the text that follows provides details on each of the internal registers.
  • Page 42 POL0 - POL2 These registers are accessible when Page 1 is selected. They allow interrupt polarity selection on a port–by–port and bit-by-bit basis. Writing a 1 to a bit position selects the rising edge detection interrupts while writing a 0 to a bit position selects falling edge detection interrupts.

  • Page 43: Pc/104 Bus

    NOTES: 1. Rows C and D are not required on 8-bit modules. 2. B10 and C19 are key locations. WinSystems uses key pins as connections to GND. 3. Signal timing and function are as specified in ISA specification. 4. Signal source/sink current differ from ISA values.

  • Page 44: Pc/104-Plus Bus

    PC/104-Plus BUS Visual J18 - PC/104-Plus Index PCB Connector: TEKA 2MR430-BDWM-368-00 The PC/104-Plus is electrically equivalent to the 33 MHz PCI bus and is terminated to a 120-pin, nonstackthrough connector. The standard PC/104-Plus I/O modules can be populated on EBC-C384’s PC104-Plus bus. The interface does not support hot swap capability.

  • Page 45: Minipci

    Index The EBC-C384 includes a MiniPCI socket at J27. Though the socket can support other devices, it is primarily intended for adding a video module. WinSystems offers MPCI-VGA-Z9S to simplify the connection. Additionally, wireless activity is optional via MiniPCI. MiniPCI Device Interface (CN1)

  • Page 46: Bios Supplemental

    BIOS SUPPLEMENTAL General Information The EBC-C384 includes BIOS from Phoenix Technologies to assure full compatibility with PC operating systems and software. The basic system configuration is stored in battery backed CMOS RAM within the clock/calendar. As an alternative, the CMOS configuration may be stored in EEPROM for operation without a battery. For more information of CMOS configuration, see the BIOS Settings Storage Options section of this manual.
  • Page 47 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Main Menu System Time: 09:40:34 System Date: 04/09/2010 >IDE Primary Master None >IDE Primary Slave None >SATA Port 1 None >SATA Port 2 None System Memory:...
  • Page 48 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Depending on the Primary Master Type, various Primary Master options will be available. See the following screens. Main Menu > IDE Primary Master/Slave [None] Type: Auto...
  • Page 49 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Depending on the Primary Master Type, various Primary Master options will be available. See the following screens. Main Menu > SATA Port 1 / SATA Port 2 Type: Auto...
  • Page 50 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Advanced Installed O/S: Win95 Options: Other Win95 Win98 WinMe Win2000 Reset Configuration Data: Options: Large Disk Access Mode: Options: Other Summary screen: Disabled Options:...
  • Page 51 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > CPU Control Sub-Menu > Video (Intel IGD) Control Sub-Menu > ICH Control Sub-Menu > Super I/O Control Sub-Menu >...
  • Page 52 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > CPU Control Sub-Menu Hyperthreading: Enabled Options: Disabled Enabled Enabled Processor Power Management: Options: Disabled GV3 Only C-States Only Enabled Enhanced C-States Enable: Enabled...
  • Page 53 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > CPU Control Sub-Menu > CPU Thermal Control Sub-Menu Thermal Control Circuit: Disabled Options: Disabled TM1 and TM2 DTS Enable: Disabled Options: Disabled...
  • Page 54 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > CPU Control Sub-Menu > CPU Thermal Control Sub-Menu (continued) Passive TSP Value: Options: Critical Trip Point: Options: 15 C 23 C 31 C 39 C...
  • Page 55 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > Video (Intel IGD) Control Sub-Menu IGD - VBIOS Boot Type: Options: VBT Default CRT+LFP > IGD - LCD Control Sub-Menu DVMT 4.0 Mode: Auto Options:...
  • Page 56 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > Video (Intel IGD) Control Sub-Menu > IGD - LCD Control Sub-Menu IGD - LCD Panel Type: 3: 1024x768 LVDS Options: 1: 640x480 LVDS...
  • Page 57 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > ICH Control Sub-Menu > Integrated Device Control Sub-Menu Serial IRQ Quiet Mode: Enabled Options: Disabled Enabled Pop Up Mode Enable: Enabled Options: Disabled...
  • Page 58 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > ICH Control Sub-Menu > Integrated Device Control Sub-Menu > PCI Express Control Sub-Menu > ICH USB Control Sub-Menu Azalia - Device 27, Function 0: Auto Options:...
  • Page 59 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > ICH Control Sub-Menu > Integrated Device Control Sub-Menu > PCI Express Control Sub-Menu Enabled PCI Express - Root Port 1: Options: Disabled Enabled...
  • Page 60 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > ICH Control Sub-Menu > Integrated Device Control Sub-Menu > PCI Express Control Sub-Menu PCI/PNP ISA IRQResource Exclusion IRQ 3: Available Options: Available...
  • Page 61 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > ICH Control Sub-Menu > Integrated Device Control Sub-Menu > ICH USB Control Sub-Menu Fun #0,1,2,7 USB Dev #29 Options: Disabled Fun #0...
  • Page 62 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > Super I/O Control Sub-Menu Serial port 1: Enabled Speed: Base I/O address: Interrupt: IRQ 4 Interface: RS232 Options: Port x: Speed: Base I/O address:...
  • Page 63 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > Super I/O Control Sub-Menu (continued) Serial port 4: Enabled Speed: Base I/O address: Interrupt: IRQ 6 Interface: RS232 Options: Port x: Speed:...
  • Page 64 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > ACPI Control Sub-Menu Passive Cooling Trip Point: 55 C Options: Disabled 55 C 63 C 71 C 79 C 87 C 95 C 103 C...
  • Page 65 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Intel > ACPI Control Sub-Menu (continued) Critical Trip Point: Options: 15 C 23 C 31 C 39 C 47 C 55 C 63 C 71 C...
  • Page 66 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Security Supervisor Password Is: Clear User Password Is: Clear Set Supervisor Password: Enter Set User Password: Enter Disabled Virus check reminder: Options: Disabled Daily...
  • Page 67 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Boot Boot priority order: Options: Excluded from boot order: Options: All IDE HDD All USB Floppy All USB Key All USB HDD All USB CDROM All USB ZIP All USB LS120...
  • Page 68 Note: Defaults are indicated in bold for BIOS properties. Default options that cannot be user-modified are indicated with grey text. Exit Exit Saving Changes Exit Saving Changes to CMOS and EEPROM Exit Discarding Changes Load Setup Defaults Discard Changes Save Changes 140703...

  • Page 69: Bios Settings Storage Options

    BIOS SETTINGS STORAGE OPTIONS CMOS Storage Locations The EBC-C384’s BIOS configuration is stored in three (3) locations: (1) CMOS RAM (nonvolatile if battery backed) (2) EEPROM (nonvolatile storage for user defaults) (3) FLASH PROM (nonvolatile storage for factory defaults) Saving the CMOS Configuration The Real-Time Clock and the CMOS RAM settings can be maintained by an optional battery when the board is powered off.
  • Page 70 Updating the BIOS FLASH PROM The most recent EBC-C384 BIOS is available on the WinSystems website. However, it is highly recommended that an Applications Engineer be consulted prior to any BIOS FLASH PROM update. If the BIOS PROM is updated, the steps described above must be followed to reset the CMOS and EEPROM to the newly loaded factory defaults and to clear the data from the previous BIOS version.

  • Page 71: Cables

    CABLES Part Number Description CBL-SET-384-2 Cable set for EBC-C384 includes: ADP-IO-USB-001 Dual 8-pin, 2-mm. 4 USB ports CBL-173-G-1-1.0 20-pin ribbon to two 9-pin male D connector adapter CBL-234-G-1-1.375 14-pin ribbon to 15-pin D-sub CRT adapter CBL-236-G-2-1.5 Power cable (unterminated) CBL-247-G-1-1.0 1-ft., Multi-I/O adapter CBL-343-G-1-1.375 PS/2 Mouse Adapter...

  • Page 72: Software Drivers

    SOFTWARE DRIVERS See WinSystems website. 140703...

  • Page 73: Specifications

    * - Thermal profiles can vary greatly depending on the operating system and applications being used. WinSystems uses the Intel TAT (Thermal Analysis Tool) for testing with Intel processors. This program heavily loads the system and creates a worst case scenario for the single board computer. Specific real world applications will rarely tax the system as heavily and may allow for extending the fanless operational range.

  • Page 74: Mechanical Drawing - Top View

    MECHANICAL DRAWING - TOP VIEW 7.800 [198.12] 7.600 [193.04] 7.600 [193.04] 7.125 [180.98] 6.950 [176.53] 6.750 [171.45] 6.375 [161.93] 6.192 [157.27] 5.800 [147.32] 5.700 [144.78] 4.407 [111.94] 3.381 [85.88] 2.800 [71.12] 2.650 [67.31] 2.350 [59.69] 1.841 [46.77] 1.391 [35.33] .305 [7.75] .125 THRU .250 MOUNTING AREA (8 PLCS)

  • Page 75: Mechanical Drawing - Bottom View

    MECHANICAL DRAWING - BOTTOM VIEW 6.066 [154.07] 5.652 [143.55] 3.685 [93.61] 3.538 [89.87] 3.028 [76.92] .115 [2.92] 140703...

  • Page 76: Best Practices

    APPENDIX - A BEST PRACTICES POWER SUPPLY The power supply and how it is connected to the Single Board Computer (SBC) is very important. Avoid Electrostatic Discharge (ESD) Only handle the SBC and other bare electronics when electrostatic discharge (ESD) protection is in place. Having a wrist strap and a fully grounded workstation is the minimum ESD protection required before the ESD seal on the product bag is broken.
  • Page 77 Contact Points WinSystems’ boards mostly use connectors with gold finish contacts. Gold finish contacts are used exclusively on high speed connections. Power and lower speed peripheral connectors may use a tin finish as an alternative contact surface. It is critical that the contact material in the mating connectors is matched properly (gold to gold and tin to tin).
  • Page 78 CONFORMAL COATING Applying conformal coating to a WinSystems product will not in itself void the product warranty, if it is properly removed prior to return. Coating may change thermal characteristics and impedes our ability to test, diagnose, and repair products.
  • Page 79 Every single board computer has an Operations manual or Product manual. Manual Updates Operations/Product manuals are updated often. Periodicially check the WinSystems website (http://www.winsystems.com) for revisions. Check Pinouts Always check the pinout and connector locations in the manual before plugging in a cable. Many single board computers will have identical headers for different functions and plugging a cable into the wrong header can have disastrous results.

  • Page 80: Post Codes

    APPENDIX - B POST CODES If the system hangs before the BIOS can process the error, the value displayed at the I/O port I/O address 80h is the last test that performed. In this case, the screen does not display an error code. The following is a list of the checkpoint codes written at the start of each test and their corresponding audio beep codes issued for terminal errors.
  • Page 81 Code Beeps Location Description Chipset re-initialization System shadow (shadow BIOS ROM) Cache re-initialization Cache auto-size Debug server initialization Advanced chipset initialization Advanced register configuration Read hardware RomPilot memory initialization Speed RomPilot initialization Interrupt vectors initialization Set BIOS interrupt Device initialization 2-1-2-3 Check ROM copyright Config (Check video configuration against CMOS)
  • Page 82 Code Beeps Location Description RTC test Keyboard test Key lock Hardware interrupts Intelligent System Monitoring (ISM) initialization Coprocessor initialization (if present) I/O initialization (before) Late device initialization RS-232 initialization FDISK config IDE LPT initialization PCI PCC initialization (PC-compatible PnP ISA devices) I/O initialization (after) Motherboard Configurable Devices (MCD) initialization BIOS data-area initialization (BDA)
  • Page 83 Code Beeps Location Description Terminate QuietBoot Check password ACPI initialization System initialization Prepare to boot DMI - SMBIOS initialization BCV (Boot Connection Vectors) initialization Parity - clear parity checkers MultiBoot-XP boot menu display Clear screen Check reminders (virus and backup) INT19 - boot POST Error Manager (PEM) - Initialization POST Error Manager (PEM) - Logging initialization...
  • Page 84 Boot Block Code Description TP_BB_CS_INIT - Chipset Init TP_BB_BRIDGE_INIT - Bridge Init TP_BB_CPU_UNIT - CPU Init TP_BB_TIMER_INIT - System timer Init TP_BB_IO_INIT - System I/O Init TP_BB_FORCE - Check force recovery boot TP_BB_CHKSUM - Check BIOS Checksum TP_BB_GOTOBIOS - Go to BIOS TP_BB_MP_INIT - Init Multi Processor TP_BB_SET_HUGE - Set Huge Seg TP_BB_OEM_INIT - OEM Special Init...

  • Page 85: Warranty Information

    WARRANTY INFORMATION (http://www.winsystems.com/warranty.cfm) WinSystems warrants to Customer that for a period of two (2) years from the date of shipment any Products and Software purchased or licensed hereunder which have been developed or manufactured by WinSystems shall be free of any material defects and shall perform substantially in accordance with WinSystems’...

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