Sony STR-DG910 Service Manual page 72

STR-DG910
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3 7 63 1515 0
IC3803 CXD9837R (PROGRESSIVE SCAN CONVERTER) (HDMI RE BOARD (4/4))
Pin No. Pin Name
1 DVDD
2 CLKI
3 TEST17(PLL_TEST)
4 PLL_EN
5, 6 P10, P11
7 to 14 P12 to P19
15 NHSI
16 NVSI
17 OVSS
18 THRM (IVSS)
19 CVSS
20 NVSO
21 NHSO
22 to 25 P09 to P06
26 OVDD
27 OVSS
28 to 33 P05 to P00
34 TEST0
35 OVSS
36 OVDD
37 CVDD
38 TEST1
39 TEST2
TE
L 13942296513
40 CLKO
41 to 45 Y09 to Y05
46 OVDD
47 OVSS
48 to 50 Y04 to Y02
51, 52 Y01, Y00
53 OVDD
54 CVSS
55 OVSS
56, 57 C00, C01
58 to 60 C02 to C04
61 OVDD
62 OVSS
63 to 67 C05 to C09
68 FILM
69 RFFI (W3IF)
70 OVSS
71 CVDD
72 IVDD
73 OVDD
74 to 77 MD19 to MD16
78 OVDD
79 OVSS
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80 to 83 MA3, MA4, MA2, MA5
84 OVDD
85 OVSS
.
86 to 89 MA1, MA6, MA0, MA7
90 OVSS
91 TEST5 (IVSS)
72
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I/O
— Power supply pin (+3.3 V) (for I/O)
I System clock signal input (27 MHz)
I Test pin (Fixed at VSS in this set)
I PLL enable signal input
I Video data input (Fixed at L in this set)
I Video data input from video A/D converter.
I Horizontal sync signal input from video A/D converter.
I Vertical sync signal input from video A/D converter.
— Ground (for I/O)
I Through mode setting terminal (Fixed at L in this set)
— Ground (for core)
O Vertical sync signal output for video encoder.
O Horizontal sync signal output for video encoder.
O Video signal output (Not used in this set)
— Power supply pin (+3.3 V) (for I/O)
— Ground (for I/O)
O Video signal output (Not used in this set)
I Test pin (Fixed at L in this set)
— Ground (for I/O)
— Power supply pin (+3.3 V) (for I/O)
— Power supply pin (+2.5 V) (for core)
I Test pin (Fixed at L in this set)
I Test pin (Fixed at L in this set)
O System clock output (27 MHz) for video encoder.
O Video signal output for video encoder.
— Power supply pin (+3.3 V) (for I/O)
— Ground (for I/O)
O Video signal output for video encoder.
O Video signal output (Not used in this set)
— Power supply pin (+3.3 V) (for I/O)
— Ground (for core)
— Ground (for I/O)
O Video signal output (Not used in this set)
O Video signal output for video encoder.
— Power supply pin (+3.3 V) (for I/O)
— Ground (for I/O)
O Video signal output for video encoder.
O Film sequence detection flag signal output (Not used in this set)
I MPEG flag (repeat first field flag) signal input (Fixed at L in this set)
— Ground (for I/O)
— Power supply pin (+2.5 V) (for core)
— Power supply pin (+3.3 V) (for I/O)
— Power supply pin (+3.3 V) (for I/O)
I/O Two-way data bus input/output (Not used in this set)
— Power supply pin (+3.3 V) (for I/O)
— Ground (for I/O)
O Address signal output for SD-RAM.
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— Power supply pin (+3.3 V) (for I/O)
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— Ground (for I/O)
i
O Address signal output for SD-RAM.
— Ground (for I/O)
— Ground (for I/O)
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2 9
8
Pin Description
Q Q
3 6 7 1 3 1 5
co
.
9 4 2 8
0 5 8 2 9 9 4 2 8
m
9 9
9 9