Sony STR-DG910 Service Manual page 65

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• IC Pin Descriptions
IC1009 ADSP21266SKSTZ-2C (DSP EX3) (DIGITAL BOARD (3/5))
Pin No.
1
2
3
4 BOOTCFG0
5 BOOTCFG1
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TE
L 13942296513
23
24 to 26 AD6 to AD4
27
28
29, 30
31
32
33, 34
35
36, 37
38
39
40
41 to 43 AD15 to AD13
44
45
46
47
48
49 to 52 AD11 to AD8
53
www
54
55
56, 57
.
58
59
60
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Pin Name I/O
VDDINT — Power supply terminal (+1.2 V)
CLKCFG0 I Clock frequency setting signal input 0
CLKCFG1 I Clock frequency setting signal input 1
I Boot mode setting signal input 0 from DSP.
I Boot mode setting signal input 1 from DSP.
GND — Ground
VDDEXT — Power supply terminal (+3.3 V)
GND — Ground
VDDINT — Power supply terminal (+1.2 V)
GND — Ground
VDDINT — Power supply terminal (+1.2 V)
GND — Ground
VDDINT — Power supply terminal (+1.2 V)
GND — Ground
INT_REQ O Interrupt status output for main system controller.
DIR_ERR O PLL lock error signal and data error flag output for main system controller.
AD7 I/O Two-way data bus and address signal output 7 with S-RAM. (Not used in this set)
GND — Ground
VDDINT — Power supply terminal (+1.2 V)
GND — Ground
VDDEXT — Power supply terminal (+3.3 V)
GND — Ground
VDDINT — Power supply terminal (+1.2 V)
I/O Two-way data bus and address signal output 6 to 4 with S-RAM. (Not used in this set)
VDDINT — Power supply terminal (+1.2 V)
GND — Ground
AD3, AD2 I/O Two-way data bus and address signal output 3, 2 with S-RAM. (Not used in this set)
VDDEXT — Power supply terminal (+3.3 V)
GND — Ground
AD1, AD0 I/O Two-way data bus and address signal output 1, 0 with S-RAM. (Not used in this set)
XWR O Data write enable signal output for S-RAM. (L: active) (Not used in this set)
VDDINT — Power supply terminal (+1.2 V)
GND — Ground
XRD O Read strobe signal output for S-RAM. (L: active) (Not used in this set)
ALE O Address latch enable signal output (Not used in this set)
Two-way data bus and address signal output 15 to 13 with S-RAM.
I/O
(Not used in this set)
GND — Ground
VDDEXT — Power supply terminal (+3.3 V)
AD12 I/O Two-way data bus and address signal output 12 with S-RAM. (Not used in this set)
VDDINT — Power supply terminal (+1.2 V)
GND — Ground
Two-way data bus and address signal output 11 to 8 with S-RAM.
I/O
(Not used in this set)
A16 O Address signal output 16 for S-RAM. (Not used in this set)
VDDINT — Power supply terminal (+1.2 V)
x ao
GND — Ground
y
A17, A18 O Address signal output 17, 18 for S-RAM. (Not used in this set)
i
GND — Ground
VDDEXT — Power supply terminal (+3.3 V)
VDDINT — Power supply terminal (+1.2 V)
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2 9 9 4 2 8
Pin Description
1 5 0 5 8 2 9 9 4
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STR-DG910
9 9
2 8 9 9
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